IN Brief:
- Guillaume Etorre has joined SiPearl as chief operating officer ahead of the Rhea1 CPU launch.
- His remit covers chip design, applications, reference systems, operations, quality, and information systems.
- The appointment comes as Europe’s sovereign processor programmes move from R&D into industrial delivery.
SiPearl has appointed Guillaume Etorre as chief operating officer as the French fabless processor company prepares to bring its first-generation Rhea1 CPU to market.
Etorre joined the company on 26 January 2026 and reports to chief executive Philippe Notton. He has also become a member of SiPearl’s executive committee. His responsibilities cover chip design, applications, reference systems, operations, quality, information systems, and the teams attached to those functions.
SiPearl is developing secure, high-performance, energy-efficient processors for supercomputing, artificial intelligence, and data centre workloads. Rhea1, its first CPU, features 80 Arm Neoverse V1 cores and 61 billion transistors. The device is currently being manufactured and is due to reach the market in the coming weeks.
The processor is expected to be used in European exascale systems, including the JUPITER supercomputer in Germany. SiPearl’s second-generation Rhea2 processor is planned for the Alice Recoque supercomputer in France, extending the company’s roadmap beyond its first commercial device.
Etorre brings experience across semiconductor design and electronics product development. Earlier in his career, he worked in chip design for set-top box and television applications at Sigma Designs, Let It Wave, and Zoran. He later held senior roles at Devialet and Delta Dore, including general management and product development responsibilities. At Delta Dore, he led the smart home business unit as deputy chief executive and general manager, expanding the business from a France-focused operation into a wider European organisation.
SiPearl is entering the stage where processor development depends as much on operational execution as on architecture. A high-performance CPU requires reference platforms, validation infrastructure, firmware, software enablement, compilers, libraries, documentation, customer support, quality systems, and manufacturing coordination. Those functions determine whether silicon can move efficiently from fabrication into deployable systems.
European processor sovereignty has been shaped by public funding, national supercomputing programmes, and a desire to reduce dependence on non-European architectures for critical computing infrastructure. Delivering that ambition requires more than a processor roadmap. System builders and computing centres need stable hardware platforms, software maturity, and production schedules that can support procurement and deployment decisions.
Rhea1 will enter a market dominated by US processor suppliers, advanced Asian manufacturing capacity, and increasingly vertically integrated AI compute platforms. European alternatives must compete on performance per watt, software readiness, supply confidence, and integration support. That places heavy demands on companies still moving from deep-tech development structures into commercial semiconductor operations.
Etorre’s appointment gives SiPearl an executive responsible for the functions that sit between silicon design and real deployment. As Rhea1 approaches launch, the company’s ability to align design, reference systems, quality, and customer enablement will shape how quickly its European processor programme can move from strategic objective to installed compute capacity.
