onsemi launches SiC pairing tool

onsemi launches SiC pairing tool

onsemi has launched a SiC pairing tool for power designers.


IN Brief:

  • onsemi’s Elite Pairing Studio helps match SiC MOSFETs with gate drivers.
  • The tool evaluates switching timing, gate waveforms, voltage overshoot, and switching losses.
  • SiC power design is shifting toward earlier device-pairing and system-simulation workflows.

onsemi has launched Elite Pairing Studio, an online design tool for matching silicon carbide MOSFETs with gate drivers in power electronics systems.

The cloud-based environment gives engineers a structured way to compare onsemi SiC MOSFET and gate-driver combinations against application requirements. It evaluates switching timing, gate voltage and current waveforms, voltage overshoot margins, and switching energy losses, with results shown through an interactive waveform viewer.

The tool also connects with onsemi’s wider simulation environment. Pairing results can be carried into PLECS system-level simulation models and evaluated through the company’s Elite Power Simulator, allowing efficiency, thermal behaviour, and loss performance to be refined beyond the initial component match.

Gate-driver selection has become one of the defining decisions in SiC power-stage design. The driver and MOSFET combination influences efficiency, electromagnetic interference, switching stress, thermal behaviour, short-circuit response, and reliability margin. A device that performs well in isolation can still be a poor fit if the driver pairing produces excessive overshoot, slow switching, or difficult layout constraints.

Faster switching devices have also made parasitics, gate-loop behaviour, isolation, and thermal coupling more visible. Datasheet comparison still has a role, but it rarely captures the full interaction between driver output behaviour, MOSFET characteristics, package inductance, board layout, and converter operating conditions. Earlier simulation can narrow the design space before prototypes expose expensive power-stage problems.

The growing importance of consistent SiC design practice can be seen in JEDEC’s SiC reliability guidance, which places greater attention on stress conditions and qualification evidence. Higher-voltage power supply design is moving in the same direction, with 800VDC auxiliary PSU development showing how board-level power architectures are becoming more demanding.

SiC adoption is spreading beyond traction inverters into industrial drives, battery storage, charging infrastructure, grid equipment, and high-density data-centre power. Each application has its own switching frequency, protection, isolation, thermal, and lifetime requirements. A pairing tool cannot replace laboratory validation, but it can reduce the number of unsuitable combinations before hardware is built.

onsemi’s launch also points to a broader change in how power semiconductor suppliers compete. Device figures of merit are still central, but engineers increasingly need validated design environments, waveform visibility, and simulation handoff to move from part selection to working converter. In wide-bandgap power electronics, the support software is becoming part of the product.


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