NanoBridge adopts Siemens FPGA synthesis flow

NanoBridge Semiconductor has adopted Siemens Precision FPGA Synthesis for its NBS6503H and NBS1201 programmable-device families, with a tuned version of the synthesis technology to be supplied to customers through an OEM agreement. The arrangement adds device-specific logic synthesis to an FPGA ecosystem aimed at low-power and harsh-environment applications.

Logic synthesis converts an RTL hardware description into a gate-level implementation that can be mapped onto the resources available inside the target device. Although general synthesis technology can support several programmable architectures, device-specific optimisation affects how logic structures are inferred, combined, and prepared for implementation. Tuning the flow for NanoBridge’s devices gives customers a supported target rather than requiring them to adapt a generic synthesis route themselves.

The agreement covers the NBS6503H and NBS1201 families and establishes Precision FPGA Synthesis as the logic-synthesis technology around those parts. Siemens says the collaboration will also provide a basis for further design enablement, technical support, and ecosystem development, recognising that synthesis is only one stage in the chain required to move HDL code into working programmable hardware.

NanoBridge develops non-volatile FPGA and memory technology using its proprietary NanoBridge approach. Retaining configuration without external power changes several system assumptions compared with SRAM-based programmable logic, particularly around start-up and standby behaviour. The company positions the technology for applications requiring high power efficiency and reliability, including aerospace, smart infrastructure, secure elements, and automotive systems.

Those markets also tend to place greater emphasis on repeatable development flows. Programmable logic used in infrastructure, transport, or aerospace systems may remain in service for many years, while hardware and software revisions have to be controlled against qualification evidence. Changes in synthesis behaviour can alter resource use, timing, or the structure of an implementation, making tool versioning and predictable optimisation part of configuration management rather than simply a developer convenience.

Software ecosystem depth is particularly important for smaller FPGA suppliers competing with established device families. Engineers normally approach a new programmable architecture with existing RTL, verification environments, timing constraints, build scripts, and debug procedures. Every unfamiliar tool or unsupported stage increases the engineering effort required before the silicon itself can be assessed, which can discourage adoption even where the underlying device has useful power or reliability characteristics.

The OEM arrangement reduces one of those barriers by making a device-tuned synthesis flow available directly through NanoBridge. Designers can retain standard hardware-description languages while the synthesis stage is configured for the structure of the NBS6503H and NBS1201. The resulting flow should also give NanoBridge and Siemens a defined route for maintaining synthesis support as implementation rules or device families evolve.

Harsh-environment applications add another reason for closer tool support because device selection is usually accompanied by extensive electrical, environmental, and system qualification. Non-volatile configuration can simplify parts of the start-up architecture, but it does not remove requirements around timing closure, radiation behaviour where applicable, functional safety, EMC, or device lifetime. A credible FPGA offering therefore depends on both the programmable technology and the tools used to turn an engineering design into a repeatable implementation.

Siemens and NanoBridge have not announced a new device specification, production milestone, or customer programme alongside the agreement. The immediate development is design enablement: two existing FPGA families now have a synthesis flow explicitly tuned to their architectures and intended for distribution through the device supplier. The next measure of ecosystem maturity will be the depth of the surrounding implementation, verification, and debug support and the production programmes that adopt it.