Besi joins Tata advanced packaging build-out

Besi joins Tata advanced packaging build-out

Besi will support Tata Electronics’ advanced semiconductor packaging expansion programme. The agreement covers equipment, process readiness, engineering capability and a technology roadmap for the $3 billion Jagiroad facility.


IN Brief:

  • Tata Electronics will draw on Besi's advanced packaging equipment and process portfolio for its Jagiroad facility.
  • The $3 billion Assam operation is being developed as an indigenous semiconductor assembly and test facility.
  • The companies will also examine equipment support, training, certification, and joint process-development work.

Tata Electronics has signed a memorandum of understanding with BE Semiconductor Industries, or Besi, to support advanced packaging at its $3 billion semiconductor assembly facility under development in Jagiroad, Assam.

The agreement gives Tata Electronics access to Besi’s advanced packaging equipment portfolio and process expertise as it prepares the Jagiroad operation for next-generation packaging. The companies will also examine local equipment support, engineering skills, training and certification, and a shared technology roadmap for future processes.

No equipment order value, tool count, installation schedule, or first production process has been announced. The agreement establishes a technical and manufacturing-development framework rather than a completed equipment purchase.

Besi supplies die-attach and packaging equipment across leadframe, substrate, and wafer-level assembly. Its portfolio includes flip-chip bonding, thermo-compression bonding, hybrid bonding, moulding, and related processes used where conventional assembly cannot provide the interconnect density, geometry, or electrical performance required by more highly integrated devices.

Those capabilities have become more important as semiconductor design moves towards chiplets and 2.5D and 3D integration. Rather than relying entirely on a single large die, designers can combine logic, memory, analogue, RF, or interface functions within a package. Interconnect pitch, alignment accuracy, thermal paths, and assembly yield then become direct constraints on system performance and manufacturing cost.

Besi’s hybrid-bonding platforms target high-density interconnect and 3D integration, while its thermo-compression systems address chiplet and interposer assembly where precise force, temperature, and alignment are required. Tata Electronics has not disclosed which of those processes will be introduced first at Jagiroad.

The facility forms part of Tata Electronics’ wider semiconductor manufacturing build-out, which also includes a planned 300mm wafer fab at Dholera in Gujarat. Together, the projects are intended to establish both front-end and back-end semiconductor manufacturing capability in India.

Advanced packaging is central to that strategy because semiconductor scaling is no longer defined by transistor density alone. High-performance computing and AI devices increasingly depend on package-level integration to connect multiple dies at high bandwidth while supplying power and removing heat. Assembly equipment, bonding accuracy, materials, and process control therefore sit much closer to the critical path of device performance.

The engineering-development element of the Besi agreement reflects that change. Training process engineers, establishing local tool support, and developing a joint technology roadmap can be as important as the equipment purchase itself during a production ramp, when tool uptime, recipe control, and yield learning determine how quickly installed capacity becomes commercially useful.

The agreement also gives Jagiroad a path to develop process capability alongside equipment installation. Advanced packaging lines have to combine bonding tools with cleaning, inspection, metrology, materials handling, and final test, while package warpage and thermal behaviour can change as layer counts and die sizes increase. Building that supporting process window is essential before a nominal tool capability becomes repeatable production output.

Packaging ramps create a different yield problem from wafer fabrication. A known-good die can lose much of its value if placement accuracy, bonding quality, warpage, or contamination causes a package-level failure after several components have already been assembled together. As package complexity rises, metrology and process control have to keep pace with the capability of the bonding tools.

Local support and training therefore affect production economics directly. A tool that can produce fine-pitch interconnects in a development environment still has to deliver repeatable alignment, force, temperature, and throughput across production lots. Maintenance response and process engineering then influence both yield and utilisation.

For Besi, the partnership places its equipment portfolio inside one of India’s largest semiconductor manufacturing investments. For Tata Electronics, it adds an established European assembly-equipment supplier to the Jagiroad technical ecosystem. Named process flows, installed tools, qualification results, and production schedules will show how quickly the memorandum develops into operational packaging capacity.


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    Besi will support Tata Electronics’ advanced semiconductor packaging expansion programme. The agreement covers equipment, process readiness, engineering capability and a technology roadmap for the $3 billion Jagiroad facility.