IN Brief:
- The three-phase reference design accepts 311–528 VAC for emerging server power architectures.
- A five-level ANPC power factor correction stage feeds a three-level LLC resonant converter.
- An integrated energy buffer provides 20 ms hold-up capability during supply interruptions.
Infineon Technologies has introduced a 27 kW three-phase power supply reference design for AI server infrastructure, combining multilevel power conversion, digital control and integrated energy storage to support demanding rack power architectures. The design is intended for server original design manufacturers and equipment manufacturers working with Open Compute Project Open Rack V3 requirements and emerging 800 VDC and ±400 VDC distribution systems.
Higher processor power requirements are changing the electrical architecture of AI racks, with greater attention being paid to the conversion stages between the incoming AC supply and the DC distribution network. Increasing distribution voltage reduces the current needed to transfer a given amount of power, although equipment must then accommodate different insulation, switching and protection requirements. Infineon’s design addresses the front end of that chain, accepting a three-phase input range of 311 to 528 VAC.
To produce the specified DC output from its three-phase AC input, the design uses a five-level active neutral point clamped (ANPC) power factor correction stage followed by a three-level LLC resonant converter. The power stage incorporates 650 V CoolSiC silicon carbide MOSFETs, CoolMOS silicon MOSFETs, EiceDRIVER gate drivers and XENSIV current sensors. PSOC microcontrollers coordinate switching and measurement as rack loads change.
The five-level ANPC stage divides conversion into smaller voltage steps than a conventional two-level arrangement, helping distribute switch voltage stress and manage losses and filtering requirements. Downstream, a three-level LLC converter uses resonant operation for efficient power transfer. Both stages need coordinated control across the specified input and load range.
Infineon reports peak conversion efficiency exceeding 98% at 480 VAC input and 50% load. The condition attached to that result is important because efficiency varies with loading, switching behaviour and the balance between fixed and variable losses. The company also reports a power density of 116 W/in³, exceeding the 94 W/in³ minimum associated with the Open Rack V3 reference requirement. An integrated planar magnetic structure supports the compact, modular layout.
Power density also places demands on thermal engineering because even a highly efficient supply must dissipate heat at elevated output power. At a nominal output of 27 kW, small percentage changes in conversion loss represent substantial differences in heat generation. Infineon specifies an ambient operating range from -5°C to 45°C, providing a defined boundary for evaluating how the reference implementation might perform within a complete rack where airflow and adjacent heat sources also need consideration.
Alongside the conversion topology, the design includes an energy buffer providing 20 milliseconds of hold-up time during short interruptions or disturbances in the incoming electrical supply. The buffer can also smooth input voltage during rapid changes in GPU power demand, reducing the need for a separate capacitor bank unit in the proposed architecture. These functions are distinct: hold-up supports continuity during a temporary supply disturbance, while transient buffering addresses fast variations in the power demanded by computing equipment.
The supply’s current and voltage control loops run digitally through the programmable power control accelerator in Infineon’s PSOC Control C3 Performance Line microcontroller. This allows current and voltage regulation to respond to changing load conditions through a coordinated control implementation. The reference design targets low input current harmonic distortion and a power factor above 0.99 across most of its operating range, reducing unwanted reactive and harmonic loading upstream.
As processors demand more electrical power, rack supply designs must balance conversion efficiency with physical volume, hold-up capacity, component temperatures and behaviour during load transients. A reference design provides a characterised starting point for that engineering work, although individual server implementations still require thermal, electrical protection and system integration validation. The published efficiency and power density figures describe Infineon’s implementation rather than guaranteed performance across every derivative design.
The specified efficiency and buffering capabilities are being presented at the Open Compute Project Global Summit in San Jose from 12 to 15 October 2026 and at OktoberTech Silicon Valley on 22 October. The introduction extends its high-voltage power conversion reference portfolio as server manufacturers investigate different ways of distributing and converting power within increasingly dense computing systems.
