Quintauris and Microchip collaborate on RISC-V validation

Quintauris and Microchip Technology have established a partnership covering RISC-V interoperability, software portability, benchmarking and validation. Announced on 14 October, the arrangement will bring Quintauris engineering services into Microchip’s RISC-V development pipeline as the companies work to improve consistency between processor implementations and their supporting software.

The collaboration will address the evaluation of RISC-V designs before production, including the performance and compatibility requirements associated with intended applications. Microchip expects the arrangement to help reduce manual validation work and development effort, although neither company has disclosed a completed benchmark, the processors initially covered or a measured reduction in engineering time.

RISC-V defines an open instruction set architecture through which software communicates with a processor. Semiconductor developers can implement the architecture in different hardware designs, selecting supported features and optional extensions according to performance, power, cost and application requirements. This flexibility enables implementations ranging from small embedded controllers to more complex computing systems, but it also introduces differences that software developers must accommodate.

Processors implementing the same base architecture may support different instruction extensions, privilege capabilities or execution environments. Software compiled for one combination of features cannot necessarily be transferred unchanged to a processor with a different configuration. The compiler, runtime environment, operating system and application may all depend on capabilities that are optional rather than common to every RISC-V implementation.

Compatibility consequently requires more than verifying that the processor executes individual instructions correctly. A complete embedded platform must support the required firmware, memory configuration, debugging facilities, interrupt handling and peripheral interfaces. Those elements affect whether software originally developed for one device can be reused on another and how much additional integration work is necessary.

Quintauris develops RISC-V reference architectures, profiles and supporting software intended to establish more consistent foundations across implementations. Its work addresses applications including automotive electronics, industrial computing and connected devices, where development teams must consider long product lifecycles and the continued availability of compatible software tools.

A profile can define a particular combination of architectural capabilities expected from processors intended for a given class of application. Such specifications provide a common basis for software development and hardware evaluation, but they do not eliminate differences in memory arrangements, peripheral functions or system-level implementation. Compatibility still depends on the requirements established for each target platform.

The new collaboration adds Quintauris benchmarking and software integration capabilities to Microchip’s development activities. Benchmarking can help compare processor configurations under defined workloads, while functional testing examines whether selected instructions and features behave as required. Consistent test conditions are essential if results from different implementations are to provide meaningful comparisons.

Compiler settings, memory configuration, processor clock frequency and the structure of a test workload can influence benchmark results. Two processors executing the same application may produce different measurements because of their surrounding hardware or software configuration rather than a difference in their instruction set. Reproducible test environments help expose those variables and establish a more reliable basis for evaluating design choices.

Functional validation examines different aspects of processor behaviour, including supported architectural features and the interaction between hardware and software. It can identify inconsistencies in an implementation or its development environment, but it cannot establish that every possible application will operate correctly. Application-specific verification remains necessary, particularly where timing constraints, peripheral behaviour or safety requirements influence the finished system.

Quintauris has separately developed the Quintauris Test Automation Framework, known as QNTAF, to provide automated benchmarking and validation across different RISC-V targets. The framework brings together processor configurations, toolchains and test environments to support comparable evaluation. Its existence provides technical context for the company’s services, but the Microchip partnership announcement does not identify QNTAF as an already integrated deliverable for a particular Microchip processor.

Microchip has an established RISC-V development portfolio, including its PolarFire system-on-chip FPGAs and Mi-V ecosystem. PolarFire SoC devices combine RISC-V processing resources with programmable logic, while Mi-V provides hardware and software development resources for supported RISC-V designs. These established technologies demonstrate Microchip’s wider involvement in the architecture.

The October announcement does not identify PolarFire SoC, Mi-V or another named processor family as the initial target of the new validation work. It would therefore be premature to describe an existing Microchip device as having completed additional Quintauris testing or received a new certification under the partnership.

Microchip’s current RISC-V hardware and software resources support a range of embedded development activities, but the requirements differ between applications. A device intended for industrial control may need predictable interrupt response and long-term software support, while a computing platform running a more complex operating system may prioritise memory management, multiprocessing and application compatibility.

Greg Robinson, corporate vice-president of Microchip’s MCU, wireless and development tools business units, identified long-term ecosystem support as a concern among customers evaluating RISC-V for microcontroller applications. The partnership is intended to contribute to common software foundations and validation practices that reduce development risk. His comments concern the direction of the collaboration, not a completed product qualification.

Quintauris was established by semiconductor companies including Bosch, Infineon, Nordic Semiconductor, NXP, Qualcomm and STMicroelectronics to support the development of compatible RISC-V technologies. Its work on shared profiles and reference architectures provides a basis for collaboration with additional processor developers, although individual commercial agreements must still define the hardware and software deliverables involved.

The companies have not disclosed contract terms, a project completion date or the first processor configuration to be evaluated. Future announcements identifying supported implementations, benchmark conditions and completed validation results would provide a more specific measure of the collaboration’s technical progress. The current development establishes the partnership and the engineering services it is intended to bring into Microchip’s processor design activities.