Keysight launches ML toolkit for device modelling

Keysight launches ML toolkit for device modelling

Keysight has released a machine learning toolkit targeting faster semiconductor modelling. The new software aims to cut compact model development and parameter extraction times from weeks to hours, accelerating PDK delivery and design technology co-optimisation workflows across advanced logic, RF, and power devices.


IN Brief:

  • Semiconductor modelling complexity is rising as GAA, wide-bandgap materials, and heterogeneous integration move into volume production.
  • Keysight has added AI/ML-driven optimisation and auto-extraction to its Device Modelling Software Suite to reduce manual effort.
  • Faster, more predictive modelling could shorten PDK delivery cycles and tighten DTCO feedback loops at advanced nodes.

Keysight Technologies, Inc. has released a new Machine Learning Toolkit within the latest version of its Device Modelling Software Suite, positioning artificial intelligence and machine learning as a practical response to the growing complexity of semiconductor compact modelling and Process Design Kit development.

The company said the toolkit reduces model development and parameter extraction timelines from weeks to hours, with the aim of accelerating PDK delivery and enabling faster Design Technology Co-Optimisation across advanced logic, RF, and power semiconductor applications.

The release comes as device architectures and materials place increasing strain on traditional modelling approaches. Gate-all-around transistors, GaN and SiC power devices, and chiplet-based integration all introduce non-linear behaviours and cross-domain interactions that are difficult to capture using physics-based compact models alone. In established workflows, engineers often adjust hundreds of interdependent parameters manually across DC, RF, temperature, and large-signal operating conditions, a process that is both time-consuming and prone to local optimisation errors.

Keysight’s Machine Learning Toolkit introduces an ML optimiser, automated extraction flows, and supporting utilities designed to address those bottlenecks. According to the company, auto-extraction workflows can reduce more than 200 manual parameter extraction steps to fewer than ten, while enabling global optimisation of more than 80 parameters in a single run. The approach is intended to improve predictive accuracy across operating domains while eliminating repeated manual tuning.

The toolkit is embedded within the Device Modelling MBP 2026 environment and integrates with existing Keysight modelling flows. Support for Python-based customisation allows users to adapt workflows to specific device types or process technologies, while maintaining a repeatable extraction framework across nodes.

Keysight said the ML-driven approach is applicable across a broad range of devices, including FinFET, GAA, GaN, SiC, and bipolar technologies. By standardising extraction flows and reducing manual intervention, the company argues that modelling teams can reuse validated workflows as processes evolve, rather than rebuilding extraction strategies for each new node or material system.

The implications extend beyond modelling efficiency. Faster parameter extraction and higher-quality compact models can shorten PDK development cycles, enabling tighter coupling between device and circuit design teams. In practice, that translates into quicker DTCO feedback loops and earlier visibility of design trade-offs, an increasingly critical requirement as process margins narrow at advanced nodes.

Nilesh Kamdar, general manager of Keysight EDA, said: “AI/ML is fundamentally transforming the traditional workflows and methodologies of compact modelling. With the new Machine Learning Toolkit, we empower our customers to deliver more predictive, higher-quality models in significantly less time — accelerating PDK development and helping them keep pace with rapidly evolving semiconductor technologies.”

Alongside the ML Toolkit, Keysight has also introduced updates across its wider device modelling portfolio. Device Modelling MQA 2026 adds new ageing model QA rules for OMI and MOSRA, while Device Modelling WaferPro 2025 introduces remote-control capabilities for low-frequency noise testing. The A-LFNA 2026 platform adds new low-frequency noise stress test functionality, enabling tighter integration between stress and noise characterisation.

For semiconductor manufacturers and foundries facing aggressive development schedules, the shift towards ML-assisted modelling reflects a broader recalibration of EDA workflows — one driven less by theoretical elegance and more by the need for speed, repeatability, and predictive confidence.


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