IN Brief:
- Renesas has launched four 100V enhancement mode FETs using its first generation REXGaN platform.
- The company reports up to 35% lower hard switching and 63% lower soft switching figures of merit than comparable GaN devices.
- Evaluation hardware includes a 48V to 12V synchronous buck platform operating from 250 kHz to 1 MHz.
Renesas Electronics has introduced its first 100V enhancement mode gallium nitride power transistors, extending the REXGaN portfolio into lower voltage conversion stages used in AI infrastructure, robotics, factory automation and industrial motor drives.
The family contains four devices: RTP100E005G1FL, RTP100E2P6G1FL, RTP100E1P8G1FL-DSC and RTP100E1P2G1FL-DSC. Renesas is targeting circuits where switching losses and passive component size begin to limit conventional low voltage silicon MOSFET designs, including power tools, solar microinverters and compact motor control hardware.
The 100V devices address a different part of the power architecture from Renesas’s recent 650V GaN products. The 650V family targets 800V rack power systems, while the new devices sit further downstream where 48V and other intermediate rails are converted closer to processors, motors or loads.
Renesas reports up to 35% lower hard switching figure of merit and up to 63% lower soft switching figure of merit than comparable GaN devices. Those measures combine electrical characteristics that pull in opposite directions, allowing the trade between conduction loss and switching behaviour to be compared without relying on on resistance alone.
RTP100E005G1FL, one member of the family, is rated at 100V with typical on resistance of 5 mΩ in a 3.3 × 3.3 mm FCLGA package. The device is normally off, and Renesas lists zero reverse recovery charge alongside low gate charge and output charge, all of which influence losses as switching frequency increases.
Reverse recovery is one of the mechanisms that separates GaN behaviour from a conventional silicon MOSFET. Current flowing through a silicon body diode stores charge that has to be removed when the current direction changes, creating additional loss and transient current. GaN does not exhibit the same stored charge process, which removes one source of switching loss in bridge circuits.
Higher switching frequency allows inductors, transformers and capacitors to shrink because less energy has to be transferred during each cycle. The gain in density brings stricter layout requirements, however, because PCB inductance, gate loop behaviour, switching node capacitance and electromagnetic emissions become more influential as edge rates rise.
Renesas’s RTP100E005G1FL evaluation board uses two 100V GaN FETs in a synchronous buck converter with a 48V input and 12V output at up to 240 W. The platform operates from 250 kHz to 1 MHz and exposes test points for examining switching waveforms and losses.
The board uses the company’s RRP68150 GaN gate driver, so the transistor can be assessed with a defined drive circuit rather than as an isolated device. Gate resistance, driver strength, dead time and current loop geometry all affect ringing and switching loss, making the surrounding circuit part of any realistic efficiency measurement.
The 3.3 mm FCLGA package also shapes the thermal limit because Renesas describes its footprint as compatible with established silicon layouts, which can reduce mechanical changes when a design moves to GaN. Electrical behaviour still differs from silicon, so the same land pattern does not remove the need to revisit gate drive, parasitics, timing and heat removal.
Some members of the family support cooling from both sides of the package, providing an additional thermal path where converter area is constrained. Lower switching losses reduce heat generation, but smaller power stages also reduce the board area available to spread the remaining conduction and switching losses.
The four FETs are available alongside evaluation boards, giving designers a supported route to measure device behaviour before committing the parts to a production power stage. Renesas now has GaN devices positioned at both high voltage front end conversion and lower voltage stages, with the 100V family aimed at circuits where faster switching can reduce passive component volume without moving the design into a substantially different power architecture.
