IN Brief:
- Tessalia is preparing a French OSAT facility for advanced system-in-package components.
- The joint venture combines Foxconn manufacturing scale, Radiall interconnect expertise, and Thales high-reliability systems experience.
- The project strengthens Europe’s advanced packaging capacity as AI, aerospace, telecoms, automotive, and medical electronics demand rises.
Foxconn, Radiall, and Thales have launched Tessalia Technology SAS, a French joint venture focused on outsourced semiconductor assembly and test for advanced system-in-package components.
The partners have laid the foundation stone for the future facility in Le Barp, Nouvelle-Aquitaine, near Bordeaux. Production is scheduled to begin by the end of 2029, with annual output expected to exceed 50 million SiP components by 2033.
The facility will target aerospace, telecoms infrastructure, automotive, and medical electronics, using advanced encapsulation technologies to increase component density while reducing board-level complexity. The companies expect the project to support investment of more than €250m and create around 800 jobs at full production capacity.
Advanced packaging has become one of the most strategically exposed parts of the semiconductor value chain. European policy has focused heavily on wafer fabrication, but the ability to assemble, test, package, and qualify complex components increasingly defines whether critical electronics can be delivered without routing the backend process through Asia.
For system designers, SiP technology offers more than a supply-chain answer. Bringing die, interconnects, passives, and substrates into a more integrated package can simplify PCB layouts, shorten interconnect paths, reduce footprint, and improve signal integrity. In aerospace, defence, telecoms, automotive, and medical equipment, those gains feed directly into size, weight, reliability, qualification, and lifecycle support.
The Le Barp site places Tessalia inside a French industrial base with existing strength in aerospace, photonics, high-reliability electronics, and advanced manufacturing. That surrounding ecosystem should help the venture support markets where package design, test, customer qualification, and long-term production assurance must be coordinated from the outset.
The project also reflects a wider European effort to close practical gaps in semiconductor capability. Europe has strong research institutions, specialist chip companies, power semiconductor production, automotive electronics expertise, and defence electronics demand, but advanced backend capacity remains a constraint as chiplet architectures and heterogeneous integration move into production systems.
Tessalia is not a commodity-volume packaging project. Its target markets point toward high-value, high-reliability components for systems with long qualification cycles and expensive redesign paths. Annual capacity above 50 million SiP components would give Europe meaningful scale in a part of the electronics chain where strategic autonomy depends on far more than wafer starts.
The rise of AI infrastructure, edge systems, and sovereign compute also makes packaging a more visible part of system performance. Intel’s Xeon 6+ update for agentic AI systems showed how processor roadmaps are becoming tied to memory, interconnect, power, and deployment architecture. Packaging now sits inside the same equation.
If Tessalia reaches production on schedule, it will add domestic capacity in a layer of the electronics value chain where design intent, manufacturing control, and qualification discipline increasingly meet.
