IN Brief:
- TI has assembled an 800 VDC power chain for AI datacentres around NVIDIA’s emerging high-voltage rack architecture.
- The design cuts 800V to GPU core power into two main conversion stages, using GaN-based bus conversion and dense multiphase buck regulation.
- As AI racks head toward megawatt-class power, higher-voltage DC is becoming a system-level electronics problem rather than a rack accessory.
Texas Instruments has moved beyond positioning individual power devices into AI infrastructure and is now pitching a full 800 VDC rack power architecture built around NVIDIA’s emerging high-voltage design. The central idea is straightforward: take 800V input down to processor rails in two major conversion stages, instead of dragging power through a longer chain of AC/DC and low-voltage DC conversions that start to look increasingly inefficient as rack power climbs.
TI’s reference design stack includes an 800V hot-swap controller for rail protection, an 800V-to-6V isolated bus converter using integrated GaN power stages, and a 6V-to-sub-1V multiphase buck stage intended for advanced GPU cores. Around that core path, the company is also lining up a 30kW 800V AC/DC power supply, 800V capacitor bank units based on supercapacitor cells, and an 800V-to-12V converter for tray-level conversion. TI is putting a headline figure of 97.6% peak efficiency on the 800V-to-6V stage, alongside power density above 2,000W/in3.
The wider context is what gives the announcement its weight. NVIDIA has already been laying out the case for 800 VDC at facility and rack level as AI infrastructure stretches beyond the limits of 54V distribution, with designs aimed at 1MW IT racks and beyond. At that point, the old penalties become hard to ignore: more current, more copper, more thermal overhead, more conversion losses, and less room in the rack for compute.
That makes TI’s move less about a single converter and more about who can credibly populate the whole chain with protection, conversion, storage, and regulation. Once rack power rises into this territory, even apparently incremental efficiency gains start showing up as space, thermal headroom, and materials savings. Higher-voltage DC stops being a theoretical optimisation and becomes a practical requirement for fitting more processing into the same physical envelope.
TI is demonstrating the platform at NVIDIA GTC 2026. The next stage is not inventing another architecture diagram; it is getting data-centre operators, rack builders, and power-system vendors to converge on implementations that can be deployed at volume, without turning the power chain into the next bottleneck in AI infrastructure.
