UMass team builds memristor-based event sensing chip

UMass team builds memristor-based event sensing chip

A UMass-led system processes touch events using memristive hardware locally. Demonstrated in Nature Sensors, the architecture combines a flexible haptic sensor array with event-triggered circuitry and a memristive system-on-chip to cut energy and latency versus conventional digital sensing pipelines.


A research team led by the University of Massachusetts Amherst has demonstrated an event-based neuromorphic sensing system that keeps more signal processing in the analog domain, using memristive hardware to reduce energy and latency costs associated with conventional digital pipelines. The work, published in Nature Sensors, combines a flexible piezoelectric haptic sensor array with event-triggered preprocessing circuitry and a memristive system on a chip, aiming to avoid converting and transmitting large volumes of data when only a small fraction is informative.

The architecture is built around a simple idea with significant hardware consequences: do not treat sensing as a frame-based, constantly sampled stream if the underlying phenomenon is sparse in time and space. In the system described, transient voltage spikes from active sensor pixels are converted into decaying waveforms that form a “time surface”, enabling event-based analog in-memory computing in the memristive chip. This approach is intended to reduce both the compute load and the energy spent on data movement, which is increasingly the limiting factor in edge AI designs.

In reported results, the proof-of-concept system achieved 87%–92% recognition accuracy for patterns written on the sensor array and reduced the energy-delay product during inference compared with conventional digital platforms. The collaboration includes researchers from UMass Amherst, Tampere University, the University of Southern California, and TetraMem Inc., reflecting a mix of academic device and systems expertise, alongside commercial interest in memristive technologies.

Qiangfei Xia, Dev and Linda Gupta professor in the Riccio College of Engineering at UMass Amherst, framed the motivation in terms of scale and practicality: “Certainly, our society is more and more connected, and the number of those devices is increasing exponentially. If everyone is collecting and processing data the old way, the amount of data is going to be exploding. We cannot handle that anymore.” He also set out the near-term engineering target: “Overall, our research goal is to reduce the power consumption, latency and hardware complexity.”

While the demonstration centres on touch sensing, the broader implication is that event-based, near-sensor processing could be applied to other signal classes where sparsity and locality are exploitable — including intelligent industrial interfaces, tactile robotics, and energy-constrained sensing in healthcare devices. The common constraint is not a lack of raw compute, but a lack of energy budget and thermal headroom once continuous conversion, transmission, and cloud connectivity are added to the bill of materials.

For electronics designers, the significance is less about a single benchmark and more about the direction of travel: if analogue pre-processing and in-memory compute can be packaged into robust, manufacturable modules, the edge device can stop behaving like a data logger and start behaving like a selective sensor, reacting only when something changes. That is the kind of shift that quietly rewrites power budgets and system architectures.


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