MegaChips adds silicon telemetry to ASIC designs

MegaChips adds silicon telemetry to ASIC designs

MegaChips will embed proteanTecs telemetry into next-generation ASIC and LSI. The collaboration targets power, performance, reliability, and lifecycle visibility from development through deployment.


IN Brief:

  • MegaChips will integrate proteanTecs on-chip monitoring into next-generation ASIC and system-LSI development.
  • Lifecycle telemetry will span development, production, and field operation, including workload-aware adaptive voltage scaling.
  • The collaboration targets AI, high-performance electronics, and co-packaged optics rather than a disclosed production device.

MegaChips is integrating proteanTecs embedded monitoring technology into next-generation ASIC and system-LSI designs, extending silicon telemetry from development and production into field operation. The collaboration is aimed at AI and other high-performance electronics where power, thermal behaviour, process variation, and reliability increasingly have to be managed throughout a device’s operating life rather than checked only during production test.

The work combines proteanTecs’ on-chip monitoring system and software applications with MegaChips’ ASIC development and Design for Test capabilities. Distributed monitors embedded in the silicon can collect operating data under real workloads, giving engineering teams information about device behaviour across voltage, frequency, temperature, and ageing conditions. The companies intend to use that data during bring-up, manufacturing, and deployment rather than maintaining separate measurement approaches for each stage.

Power management is one part of the programme. ProteanTecs’ AVS Pro application is intended to support dynamic, workload-aware voltage adjustment, replacing part of the fixed operating margin normally required to cover process, temperature, and ageing variation. Reducing supply voltage can cut dynamic power, but the remaining timing margin changes continuously with workload and device condition, making accurate silicon-level information more useful as designs operate closer to their electrical limits.

Advanced ASICs make that problem more pronounced because a single device can combine dense logic, large memories, high-speed interfaces, and substantial local power density. Package-level temperature and voltage measurements provide an important system view, but they cannot always identify conditions occurring within individual regions of a large die. Embedded monitors provide another layer of observation, allowing design teams to correlate local silicon behaviour with workload and system data.

MegaChips also expects the approach to support bring-up, yield optimisation, and reliability analysis. Production test generally has to determine whether a device falls inside an approved operating envelope, while telemetry can add information about the remaining parametric margin and how that margin changes after deployment. Used across successive silicon revisions, the same data can also help distinguish manufacturing variation from design behaviour and identify where conservative guardbands are consuming unnecessary power or performance.

The companies specifically identify advanced ASIC and co-packaged-optics designs as target areas. CPO combines high-speed electronic and optical functions within a tightly constrained package environment, bringing electrical signal integrity, heat dissipation, photonic alignment, and device reliability into the same assembly. Embedded monitoring cannot replace optical or package qualification, but it can provide additional information when engineers are trying to separate die-level behaviour from thermal and mechanical effects elsewhere in the package.

Telemetry has its own implementation cost. Monitoring structures consume silicon resources, require calibration and verification, and have to be connected to firmware and analytics without exposing sensitive implementation data or destabilising the system being measured. The usefulness of the approach therefore depends on whether the additional information improves engineering decisions enough to justify those integration and software requirements.

Using the same monitoring structures from production through field operation also creates a common reference point across the product lifecycle. Engineers can compare measurements collected during manufacturing, system qualification, and deployment instead of relying on unrelated test instruments and thresholds at each stage. That continuity is particularly relevant to high-performance devices with aggressive voltage margins or long service lives, where behaviour can change as temperature, workload, and ageing accumulate.

No production ASIC, customer tape-out, or deployment timetable has been disclosed, leaving the current milestone at the design-integration stage. The next useful evidence will come from a device using the combined flow and measured results showing whether silicon telemetry improves voltage control, yield decisions, or field reliability. MegaChips and proteanTecs have defined the monitoring framework; its value will depend on how effectively that information changes real design and manufacturing decisions.


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