Samsung reviews advanced chip packaging research in Japan

Samsung Electronics has reviewed advanced semiconductor packaging research at its Yokohama laboratory in Japan, focusing on the materials and processes needed for next-generation chip assemblies. Executive chairman Lee Jae-yong visited the Advanced Package Lab (APL) on 1 November, meeting researchers and discussing cooperation with Japanese semiconductor materials, components, and equipment companies. The visit follows the facility’s opening on 8 September and reflects research already in progress.

Samsung established the APL organisation in 2023 and has committed ¥40 billion over five years beginning in 2024 to develop its Japanese research infrastructure. The Yokohama centre is intended to test and validate packaging materials and manufacturing processes before they are incorporated into more complex semiconductor assemblies. Its location also gives researchers access to suppliers whose specialised materials and precision equipment form part of the wider electronics manufacturing chain.

Advanced packaging is increasingly important in high-performance and AI computing because the bandwidth between processors and memory can restrict system capability even when the individual chips are fast. Heterogeneous packages may place logic and high-bandwidth memory close together, using short, dense interconnections to transfer data with lower electrical losses than longer board-level paths. Delivering those advantages requires control of signal integrity, power distribution, mechanical stress, and the heat generated by multiple active dies.

The constraints extend through assembly and process qualification. Substrates, bonding materials, deposited layers, and interconnect structures expand and respond differently during heating and cooling, which can cause warpage, cracking, or electrical defects. A material that performs well by itself may behave differently once joined to other layers in a package. Researchers therefore have to assess combinations of fabrication steps, inspect defects, and establish repeatability across samples before a manufacturing process can be scaled.

During his visit, Lee reviewed work on core packaging materials and process technologies and discussed closer cooperation with Japanese suppliers. Local expertise is particularly relevant to advanced bonding, precision processing, inspection, and the materials used in substrates and interconnections. Close contact with equipment manufacturers can help a laboratory alter its process conditions and test alternatives as technical difficulties emerge, while subsequent qualification establishes which approaches are suitable for the intended devices.

Thermal management is closely connected to the choice of interconnection and bonding technology. High-density assemblies concentrate heat and impose mechanical loads on interfaces, so package designers must balance interconnect pitch, thermal paths, and long-term reliability. Process development can involve repeated thermal cycling, inspection, and electrical testing to identify faults that emerge after assembly. Samsung’s Japanese laboratory provides a setting for this materials-and-process work alongside its established semiconductor design and manufacturing capabilities.

Japanese manufacturers supply specialist materials and production equipment used in advanced semiconductor assembly. Their engineers can work with Samsung’s researchers on how process results change with material properties, equipment settings, and inspection methods. Samsung’s 1 November visit centred on those research relationships and the progress of the existing APL programme; the reported discussions did not establish a new commercial packaging qualification or production timetable.

The September opening followed the establishment of APL in 2023 and the subsequent preparation of its research facilities. Under the existing five-year investment programme, Samsung is developing its ability to examine advanced packaging materials and manufacturing steps in Japan, drawing on the local supply chain. Results from the laboratory can inform later chip-assembly development, subject to electrical, thermal, reliability, and manufacturing assessments before an experimental process can be transferred into production.

Samsung’s five-year Japanese research investment began in 2024 and runs through 2028. The Yokohama programme continues to examine the materials and production methods needed to assemble increasingly complex chips, while validation work and supplier collaboration provide the basis for future integration with its wider semiconductor operations.