IN Brief:
- EPC has demonstrated a 6kW GaN platform using an isolated ISOP stage to convert 800V to a 6V intermediate bus.
- A monolithic GaN buck converter then switches at 5MHz and produces 0.9V at 11A.
- The architecture targets the widening conversion ratio between emerging 800V AI rack distribution and sub-1V processor rails.
Efficient Power Conversion has demonstrated a 6kW gallium nitride power architecture spanning an 800V distribution bus and the sub-1V supply required at a processor core.
The demonstration uses an isolated input-series, output-parallel stage to convert 800V to a 6V intermediate rail. A monolithic GaN buck converter then operates at 5MHz and produces 0.9V at 11A, showing two very different conversion stages within the same high voltage to point-of-load power chain.
Moving data-centre rack distribution towards 800V reduces current for a given power level, cutting resistive loss and reducing the conductor cross-section required to distribute tens or hundreds of kilowatts through increasingly dense AI systems. The processor at the other end of the rack still operates below 1V, creating a conversion ratio approaching three orders of magnitude.
EPC’s first stage uses an ISOP arrangement in which converter inputs share the high voltage while the lower-voltage outputs operate in parallel. Dividing the input voltage between modules reduces the stress placed on each conversion cell and allows several lower-voltage power stages to contribute to one high-power output.
The resulting 6V rail is close enough to the processor for a high-frequency final conversion stage. EPC then uses a monolithic GaN buck regulator switching at 5MHz to produce the 0.9V output required by the demonstration load.
Operating at several megahertz can reduce the size of magnetic and capacitive components because each switching cycle transfers smaller amounts of energy. The approach also increases sensitivity to gate charge, device capacitance, parasitic inductance, switching transition time, magnetic loss, PCB geometry, and electromagnetic emissions.
GaN is being developed for this part of the power chain because its switching characteristics can support higher frequencies than conventional silicon MOSFETs in suitable voltage ranges. The system benefit still depends on the surrounding circuit; smaller semiconductors and magnetics do not improve rack density if additional cooling, filtering, or protection consumes the recovered volume.
EPC’s 6kW platform is a technology demonstration rather than a catalogue 800V rack converter with a complete published qualification and efficiency dataset. The company has disclosed the main voltage, power, switching-frequency, and point-of-load operating points, but not a full efficiency map, transient test set, thermal specification, or production schedule for the combined architecture.
The work runs alongside several competing approaches to the same electrical problem. QPT has disclosed another 800V-to-approximately-6V GaN architecture using stacked converter modules and multi-megahertz switching, while semiconductor and power-system companies are developing solid-state transformers, intermediate bus converters, protection systems, and point-of-load stages for emerging high-voltage racks.
The architectures differ in implementation, but all face the same system constraint: high rack voltage reduces upstream distribution current without changing the processor’s need for enormous current at a fraction of a volt. The energy still has to pass through isolation, intermediate conversion, final regulation, conductors, connectors, and local energy storage before reaching the silicon.
Fast load transients complicate the final stages further. AI accelerators can change current demand sharply as workloads move between operating states, placing pressure on the regulator response and the amount of capacitance required close to the processor package.
Higher switching frequency can improve response time, but it also leaves less margin for layout error and parasitic effects. At 5MHz, conductor geometry, package inductance, gate-loop design, magnetic construction, and thermal impedance become tightly coupled parts of the converter rather than secondary implementation details.
EPC has been developing low-voltage GaN devices and integrated power stages for AI power conversion alongside the high-voltage architecture. Its wider work includes intermediate bus conversion and point-of-load devices designed to operate at frequencies around and above 1MHz, giving the 800V demonstration a connection to an existing component programme rather than an isolated laboratory topology.
The 6kW platform establishes that EPC can connect an 800V input, isolated intermediate stage, and 5MHz final regulator in one demonstration chain. Efficiency under sustained load, electromagnetic compatibility, insulation coordination, transient response, cooling, fault handling, and production repeatability will determine how much of that architecture can transfer into commercial AI rack hardware.
