IN Brief:
- MIPS and Green Hills have launched a joint Safety SDK for automotive and industrial systems targeting ASIL-D and SIL 3/4 compliance.
- The package combines MIPS’ M8500 RISC-V safety processor with Green Hills’ MULTI toolchain, compilers, DoubleCheck static analysis, and µ-velOSity RTOS.
- With early-access requirements now being gathered, the collaboration is aimed at shortening the path from RISC-V evaluation to certifiable production hardware.
MIPS and Green Hills Software have launched a jointly developed Safety Software Development Kit aimed at one of the more stubborn bottlenecks in embedded development: getting safety-critical automotive and industrial designs through certification without forcing engineering teams to assemble processor IP, RTOS, tools, static analysis, and evidence packs from multiple suppliers.
The new SDK targets ASIL-D and SIL 3/4 programmes and is built around MIPS’ RISC-V-based M8500 safety processor and Green Hills’ safety-certified software stack. MIPS said the package integrates the M8500 ASIL-D-targeted functional safety processor with the Green Hills MULTI toolchain, Optimizing C/C++ Compilers, DoubleCheck static analyzer, µ-velOSity RTOS, and design services. Early-access customers are also being lined up for evaluation platforms, motor-control demonstrations, and development tools.
The bottleneck in these programmes is rarely raw compute alone. It is traceability, determinism, tool qualification, OS evidence, and the sheer amount of validation work needed to prove that a design will behave correctly when faults appear. Green Hills already brings a strong position there: its industrial safety platform centres on the INTEGRITY RTOS, certified to IEC 61508 SIL 3 and applicable to systems requiring certification up to SIL 4, while its wider product line includes certified compilers, debugging tools, static analysis, and RISC-V support.
On the hardware side, MIPS has been positioning the M8500 as a real-time microcontroller platform for sub-10μs control-loop algorithms in applications including motor control, digital power conversion, battery management, EVs, and industrial robotics. The company says the processor is designed for real-time, multi-threaded compute and can scale into automotive-qualified SoC platforms built around multiple lock-stepped cores for safety workloads.
Drew Barbier, vice president, IP Business Unit at MIPS, said: “By combining MIPS’ high-performance M8500 architectures with Green Hills Software’s proven safety-certified tools and RTOS, we are enabling new Physical AI platforms with real-time, safety-critical compute for automotive and industrial markets.”
There is a broader market move underneath this. RISC-V has gathered momentum across edge processing, custom silicon, and embedded design, but safety-certified MCU development has remained heavily shaped by tightly integrated incumbent ecosystems. A package like this is intended to narrow that gap by offering something much closer to a certifiable flow than a bare architecture play. In other words, it is not just about whether a RISC-V core can meet the technical requirement; it is about whether the software, toolchain, and certification path can arrive together.
The next proof point will come from customer adoption rather than architecture rhetoric. But with qualified customers now being drawn into evaluation boards, demos, and tool access, MIPS and Green Hills are presenting RISC-V as a production safety platform rather than an interesting alternative. For teams building motor drives, battery systems, robotics controllers, and EV subsystems, that is the more important shift.
