TES expands PMU IP for X-FAB BCD-on-SOI platform

TES Electronic Solutions has expanded its power management IP portfolio for X-FAB’s XT018 process, adding bias current source and bandgap reference blocks for SoC designs.


IN Brief:

  • TES has added bias current source and bandgap reference IP for X-FAB’s XT018 0.18µm BCD-on-SOI technology.
  • The new blocks target complex SoC designs used in automotive, industrial automation, and IoT applications.
  • The expansion supports demand for reusable analogue IP as mixed-signal ASIC designs become more integrated.

TES Electronic Solutions has expanded its power management unit IP portfolio with new bias current source and bandgap circuit blocks implemented for X-FAB’s XT018 0.18µm BCD-on-SOI technology.

The new additions include a precision bandgap reference with dual current sources, an octuple bias current source, and a 250nA to 88µA current reference. The blocks are intended for complex system-on-chip designs that need stable internal references and biasing across automotive, industrial automation, and IoT applications.

X-FAB’s XT018 platform combines high-voltage capability with embedded non-volatile memory options and is used in applications where analogue, power, and digital control functions sit close together. Proven supporting IP can shorten analogue design cycles while keeping the implementation aligned with the target process.

Bias and reference blocks rarely attract the attention given to processors, interfaces, or sensors, but they underpin the behaviour of almost every analogue subsystem on the die. Stable references influence ADC and DAC accuracy, regulator behaviour, sensing front ends, oscillator performance, and safety-monitoring functions. Poorly characterised biasing can degrade performance even when the main circuit blocks are correctly specified.

Reusable IP for these functions gives ASIC teams a route to reduce development risk under cost and schedule pressure. More industrial and automotive systems are shifting from board-level implementations to integrated ASICs, raising the burden on analogue design teams. A single device may need high-voltage handling, low-power sensing, embedded control, diagnostics, communication interfaces, and safety mechanisms.

BCD-on-SOI technologies support that integration by combining power and analogue functions with logic on a single platform while managing isolation and high-voltage requirements. Automotive electrification, battery management, motor control, smart actuators, LED drivers, and industrial sensor interfaces all benefit from this integration, but they also demand robust analogue behaviour across temperature, voltage, and lifetime drift.

TES has been building out a broader portfolio around X-FAB’s XT018 process, including voltage regulators, oscillators, comparators, clocking, and other analogue IP. The addition of bias and reference IP fills more of the infrastructure required to support full PMU and mixed-signal subsystem design. Companies moving from discrete board architectures to custom silicon need reliable building blocks that support system assembly, verification, and qualification.

The semiconductor IP market remains uneven between digital and analogue domains. Digital IP ecosystems are mature and relatively portable, while analogue IP remains more process-specific, harder to migrate, and more dependent on layout, device modelling, and foundry characterisation. IP implemented for a named process carries more practical value than a generic design concept.

The development also strengthens the European design-services and foundry-linked IP base. Automotive and industrial companies seeking greater control over differentiated electronics need local access to ASIC design expertise, analogue IP, and process-compatible building blocks. That combination is becoming part of the industrial supply chain for mixed-signal silicon.


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