IN Brief:
- 800 V data-centre power distribution is moving from concept toward detailed protection and energy-storage design.
- Battery backup units, capacitor bank units, and solid-state circuit breakers are becoming central to AI infrastructure power architectures.
- Higher-voltage distribution can reduce current and copper demand, while increasing fault, isolation, safety, and serviceability requirements.
Infineon Technologies, Renesas, STMicroelectronics, and Navitas Semiconductor have been among the companies examining the next stage of 800 V data-centre power distribution, as rack-level storage and electronic protection move deeper into AI infrastructure design.
The technical discussion around 800 V systems is now concentrating on battery backup units, capacitor bank units, and solid-state circuit breakers. These subsystems determine how dense AI racks ride through power events, isolate faults, and maintain service continuity without adding excessive conversion losses or copper weight.
Rising rack power is forcing a reassessment of the data-centre electrical chain. Lower-voltage distribution becomes progressively harder to manage as current rises, increasing cable bulk, conduction losses, heat, connector stress, and installation complexity. Higher-voltage DC distribution reduces current for the same delivered power, but it also demands a more rigorous approach to protection, insulation, isolation, maintenance, and standards compliance.
Battery backup units can be placed closer to the rack, giving local ride-through capability and reducing dependence on purely centralised backup architectures. Capacitor bank units can respond rapidly to short-duration disturbances, while solid-state circuit breakers and eFuses can interrupt faults faster than mechanical protection devices. In a high-energy DC environment, speed alone is not enough; protection must be selective, thermally manageable, and coordinated across the rack and facility.
The same power-density pressure has been visible elsewhere in the AI infrastructure stack. Siemens’ work on reference architecture for NVIDIA AI centres brought together electrical distribution, controls, energy storage, and modular power blocks, while Lotus Microsystems’ vertical power delivery platform addressed the final stages of delivering current close to high-performance processors.
Those developments are not isolated. Facility power, rack distribution, intermediate conversion, board-level regulation, and package-level power delivery now behave as one connected design problem. A gain in one part of the chain can be lost elsewhere if it increases heat, complicates protection, or creates failure modes that are difficult to detect and isolate.
DC fault interruption remains one of the hardest engineering tasks in the architecture. Unlike AC systems, DC current does not naturally cross zero, so high-voltage, high-energy interruption must be handled through semiconductor switching, current sensing, control timing, thermal design, snubbing, and careful coordination with upstream and downstream protection. A false trip can disrupt expensive compute capacity, while a slow or incomplete trip can escalate rapidly.
Rack-level energy storage adds further design pressure. Batteries and capacitors can stabilise load behaviour and support continuity, but they bring monitoring, balancing, ageing, diagnostics, thermal containment, and service requirements. Protection electronics must account for the storage element as an active source of fault energy, not only as a backup component.
The standards landscape is also under strain. Hyperscale operators, AI silicon companies, and power-electronics suppliers are moving faster than the slower cycles of safety approval, technician training, connector standardisation, and facility design practice. High-voltage DC systems need clear service procedures and predictable isolation behaviour, particularly where rack replacement and maintenance must occur inside operational facilities.
Power electronics suppliers now face a broader systems market than a single converter or device opportunity. Wide-bandgap switches, gate drivers, current sensors, isolated auxiliary supplies, digital controllers, protection ICs, busbar assemblies, thermal materials, and monitoring software are being pulled into one architecture. The result could be more efficient and denser AI infrastructure, provided protection and serviceability are treated as core design requirements rather than downstream compliance work.
