IN Brief:
- The SBC3618 combines Intel Core Ultra Series 3 CPU, GPU, and NPU processing in 3U VPX.
- Its interfaces include 100G Ethernet, RDMA, PCIe Gen4, ECC memory, NVMe storage, and optional TSN.
- Shared architecture with earlier Abaco boards is intended to simplify processor insertion into existing programmes.
Abaco Systems has introduced the SBC3618, a rugged 3U VPX single-board computer built around Intel Core Ultra Series 3 processors for sensor fusion, autonomy, electronic warfare, and AI inference at the tactical edge.
The board aligns with the Sensor Open Systems Architecture compute-intensive profile and combines CPU, integrated GPU, and neural-processing capability within a configurable power range from 15W to 65W. Convection- and conduction-cooled versions will support different environmental and platform requirements.
Memory capacity reaches 64GB of LPDDR5 with error-correction support, accompanied by up to 1TB of NVMe storage. The data plane provides 100G Ethernet with remote direct memory access, while PCI Express Gen4 supports links to processing, networking, storage, and sensor-interface hardware elsewhere in the VPX system.
An onboard Xilinx Zynq UltraScale+ FPGA provides security and customisation resources separate from the main Intel processor. Dedicated user space can accommodate programme-specific or third-party logic for trusted start-up, interface management, monitoring, security controls, or other functions requiring deterministic hardware implementation.
Optional time-sensitive networking adds bounded-latency and synchronisation capabilities to the Ethernet interface. Deterministic behaviour still depends on the switches, endpoints, software schedules, clock sources, and network configuration used throughout the completed system.
Simon Collins, director of product management at Abaco Systems, said: “Our customers are pushing more autonomy and more AI into the platform, and they need it inside a power and thermal envelope that fits the mission.”
The SBC3618 is the compute-intensive counterpart to the SBC3518 I/O-intensive board, with approximately 90% design commonality across the family. It is also the profile-compatible successor to the SBC3612D, creating a route to newer processor technology without replacing the surrounding VPX architecture.
Compatibility can reduce integration effort, although a processor change within a deployed defence system extends well beyond the card connector. Firmware, drivers, operating systems, cybersecurity controls, thermal models, power distribution, electromagnetic compatibility, test software, and qualification evidence may all require review.
Core Ultra Series 3 introduces heterogeneous processing across CPU, GPU, and NPU resources, requiring applications to place workloads according to latency, determinism, memory movement, and software support. An inference task suitable for the NPU may still depend on preprocessing or control code running elsewhere on the processor.
Data movement can become as restrictive as arithmetic performance when high-rate sensor streams pass between interfaces, memory, and accelerators. RDMA and 100G Ethernet reduce processor involvement in selected transfers, although memory bandwidth, buffering, software architecture, and contention remain system-level considerations.
AI inference at the tactical edge also operates under different conditions from a data centre. Radar, imaging, electronic-support, communications, and navigation sensors can produce substantial data volumes, while a vehicle, aircraft, or remote sensor installation may have limited electrical power, cooling, and network access.
Local processing reduces reliance on remote compute and communication links, but it concentrates heat and software complexity inside the deployed platform. The configurable 15W-to-65W range allows performance to be traded against power consumption, provided workload benchmarks reflect the actual thermal limit and cooling arrangement.
Peak processor capability offers little operational value when it cannot be sustained at the enclosure’s maximum temperature. Conduction cooling, card wedgelocks, chassis airflow, thermal interfaces, and neighbouring board loads all influence the frequency and accelerator performance available during a mission.
Open architectures are becoming increasingly important as programmes attempt to introduce newer sensors and processors without redesigning the entire platform. The electronics architecture developing around GCAP reflects the pressure to absorb new mission computing, datalink, sensing, and electronic-warfare capabilities across several processor generations.
The wider GCAP industrial programme also depends on modular hardware, controlled interfaces, secure software, and maintainable supply chains. SOSA alignment provides a common structural framework, although programme-specific integration and qualification remain extensive.
FPGA-backed security can isolate selected functions from the general-purpose processor, but the completed platform still requires secure boot, key management, signed software, controlled updates, vulnerability monitoring, tamper response, and configuration discipline. Trust extends through firmware, applications, network devices, maintenance equipment, and manufacturing records rather than residing in one component.
Early-access SBC3618 units are available, with production scheduled for the first quarter of 2027. The interval before volume supply gives programme teams time to assess thermal performance, software portability, accelerator utilisation, network behaviour, and security implementation before entering qualification.
The board combines a current commercial processor architecture with a rugged open-standard form factor, while its operational performance will depend on the system built around it. Sustained compute, cooling, software partitioning, security evidence, and component lifecycle support will determine whether the SBC3618 becomes a straightforward technology insertion or another lengthy integration programme.
