IN Brief:
- Palomino has combined its GaN MicroLED work with Vega Links’ silicon and systems-engineering capabilities.
- The roadmap spans short-reach copper and optical connections using MicroVCSEL and MicroLED approaches.
- The transaction broadens Palomino’s engineering organisation, but no first chipset or sampling timetable has been disclosed.
Palomino Laboratories has completed its acquisition of Vega Links, combining Palomino’s gallium-nitride MicroLED work with Vega Links’ silicon-design, systems-architecture, and product-engineering capabilities. The company intends to develop chipsets spanning short-reach copper and optical connections for larger AI computing clusters.
The transaction closes a previously announced agreement and brings Karthik Gopalakrishnan into the combined company as chief technology officer, with Rajesh Radhamohan appointed chief product officer. Palomino has also added semiconductor and AI-interconnect executives Sudeep Bhoja and Dr Gopal Raghavan to its strategic advisory board.
Vega Links was established around high-speed AI and memory connectivity. Its acquisition gives Palomino a broader engineering base than the optical-device technology it previously promoted, extending the company’s remit into system architecture, silicon implementation, and the product work needed to turn an interconnect concept into qualified components.
AI accelerators communicate across several physical distances. Very short links inside a package or board can remain electrical, while longer reaches between boards, trays, and racks place greater pressure on power, signal integrity, and equalisation. No single physical medium is likely to be optimal across all of those connections.
Palomino says copper will remain important for the shortest reaches and expects optical approaches based on MicroVCSEL and MicroLED devices to become more significant as clusters scale. That position reflects the practical trade-off facing system designers: copper is familiar and economical over limited distances, while optical links can carry high data rates farther without the same electrical channel loss.
Optics does not remove the engineering burden. Emitters, modulators, detectors, drivers, packaging, fibre attachment, thermal control, and test must operate as one system. Moving an optical engine closer to a processor can reduce electrical reach, but it also exposes photonic components to the heat, yield requirements, and service expectations of advanced semiconductor packages.
Jeffrey Shealy, chief executive of Palomino Laboratories, said the acquisition “marks the beginning of an exciting new chapter for Palomino”. The company also claims that the transaction expands its estimated addressable market by approximately ten times to more than $60 billion, a management estimate rather than contracted demand or a forecast of company revenue.
The commercial objective is to produce AI-interconnect chipsets that improve bandwidth, latency, power efficiency, and scalability. Those measures are linked but not interchangeable. A design can increase raw bandwidth while consuming too much power per bit, or reduce latency while relying on packaging and assembly methods that are difficult to manufacture economically.
Vega Links’ systems expertise may be most valuable in defining where each technology belongs. An interconnect supplier needs to understand processor interfaces, switch topologies, memory traffic, rack architecture, software behaviour, and serviceability before selecting the physical link. An impressive optical device has limited value if it cannot be integrated into the mechanical, thermal, and management environment of a data-centre platform.
The acquisition also gives Palomino a more conventional semiconductor-product structure through its new technology and product leadership. That should help move the business from device research towards roadmaps, customer engagement, reference designs, and qualification, although the announcement does not identify a first chipset, sampling date, foundry partner, or production timetable.
Competition is already intense across retimers, digital-signal processors, optical engines, co-packaged optics, active electrical cables, and chiplet interfaces. Established networking and semiconductor suppliers bring manufacturing scale and customer relationships, while start-ups must prove that a narrower technology advantage survives integration into complete systems.
Manufacturing risk will be central to any MicroLED or MicroVCSEL roadmap. Yield, device uniformity, wafer processing, alignment, coupling loss, and package test all affect cost and usable performance. A laboratory emitter can demonstrate strong characteristics without establishing that millions of channels can be assembled and tested economically.
Palomino has assembled a broader technical proposition by combining optical-device work with silicon and architecture expertise. The acquisition creates the organisation needed to pursue hybrid interconnects, but the decisive milestones will be working silicon, measured power per bit, repeatable optical packaging, and customer qualification rather than the size of the market the company believes it can address.
