IN Brief:
- The Claros transaction is valued at up to approximately $232.8 million and is expected to close before year-end, subject to conditions.
- Claros adds vertical power delivery and integrated voltage regulator technology for high-current AI processors.
- Navitas intends to combine processor-level regulation with its GaN, high-voltage SiC, and 800V HVDC power portfolio.
Navitas Semiconductor has signed a definitive agreement to acquire Claros, adding vertical power delivery and integrated voltage regulator technology to its AI infrastructure portfolio. The transaction is valued at up to approximately $232.8 million and would extend Navitas’s power architecture from high-voltage conversion through to the final regulation stages close to AI processors.
Around $216 million is due at closing through a combination of cash and Navitas shares, with the balance linked to business milestones over the following two years. The boards of both companies have approved the transaction, which is expected to close before the end of 2026 subject to customary conditions and regulatory approvals.
Claros develops vertical power delivery, or VPD, and integrated voltage regulator, or IVR, technologies for high-current processors. Instead of routing low-voltage, high-current power laterally across a printed circuit board from conventional voltage regulator modules, the architecture brings conversion, drive, control, and passive elements considerably closer to the processor package.
The electrical argument becomes stronger as accelerator current rises. AI processors operate at low core voltages but can draw currents measured in thousands of amps, leaving designers with distribution losses and transient-response problems dominated by resistance and inductance in the final part of the power path. Shortening that path can reduce impedance, but it also concentrates more of the conversion and thermal problem around the processor package.
Navitas already supplies gallium nitride and silicon carbide power devices for higher-voltage conversion stages. Its AI infrastructure strategy includes 800V high-voltage direct-current architectures for distributing power into dense computing systems and racks. Claros would add technology at the opposite end of the chain, where intermediate rails are finally converted and regulated to the low voltages required by processors and accelerators.
The acquisition also broadens Navitas’s design capability beyond power switches. Claros brings expertise in digital control, passive integration, analogue and mixed-signal circuitry, and advanced 2D and 3D packaging. Those disciplines are increasingly difficult to separate in dense power modules because electrical behaviour depends heavily on package parasitics, thermal paths, interconnect geometry, and the physical placement of passive components.
Processor power delivery has become a packaging problem as much as a semiconductor problem. Raising switching frequency can reduce passive-component size, but higher frequency also increases switching losses and places greater demands on control, layout, magnetics, and thermal management. Moving regulation closer to the load reduces distribution distance while increasing the need to manage heat alongside the processor and its high-bandwidth memory.
That changes the competitive boundary for power semiconductor suppliers. Wide-bandgap devices have improved switching efficiency and frequency at higher voltages, yet AI hardware is pushing suppliers towards system-level architectures in which devices, control silicon, passives, packaging, and software have to be engineered together. Selling a faster transistor is only one part of delivering power to a processor whose load can change sharply within very short timescales.
Navitas estimates that adding Claros would more than double its identified serviceable addressable market for 2030 to over $8 billion. The company attributes at least $3.5 billion of additional opportunity to VPD and IVR, alongside its existing opportunities in GaN, high-voltage and ultra-high-voltage SiC, and newer JFET technology. Those figures are corporate projections rather than contracted demand, but they indicate the strategic weight Navitas is placing on processor-level power delivery.
The technical integration will be more important than the size of the enlarged component catalogue. VPD and IVR architectures have to align with processor-package roadmaps, board and substrate design, thermal management, and high-volume assembly processes that are themselves changing rapidly. Device technology that performs well in isolation still has to operate inside a tightly constrained mechanical and thermal system.
If the acquisition closes as planned, Navitas will be attempting to cover a power path stretching from grid-level conversion to regulation only millimetres from the processor. That gives the company exposure to more of the AI power chain, but it also leaves it dealing with a more complicated mix of semiconductor physics, control, passives, packaging, and system architecture than a conventional discrete-device supplier.
