IN Brief:
- IonQ has fabricated fully integrated 256-qubit Superion QPUs at SkyWater and trapped the first ions in prototype systems.
- The chip completed six tape-outs in the first half of 2026, while IonQ reports a design-cycle reduction from nine months to two.
- Superion 256 is open for orders for 2027 delivery; larger cryo-CMOS and fault-tolerant systems remain roadmap developments.
IonQ has introduced Superion 256, its sixth-generation trapped-ion quantum-computing platform, after fabricating fully integrated 256-qubit quantum processing units at SkyWater and trapping the first ions in prototype systems. The milestone moves IonQ’s architecture further into a repeatable semiconductor design-and-fabrication cycle, although the larger fault-tolerant systems attached to the Superion roadmap remain future developments.
The distinction between fabricated capacity and operating quantum performance is important. IonQ has produced integrated chips designed for 256 qubits and has trapped ions in prototype Superion systems, but the launch does not report a completed 256-qubit machine executing application benchmarks or fault-tolerant workloads.
The manufacturing data is more concrete. IonQ says the jointly designed Superion chip completed six tape-outs during the first half of 2026. Working with SkyWater, it reports reducing the relevant design cycle from nine months to two and producing 12 times more wafer lots over six months than under its previous foundry arrangement.
Those are company comparisons rather than industry-wide manufacturing benchmarks, but repeated tape-outs change the engineering process around the quantum hardware. A shorter iteration loop allows design changes to return to fabricated silicon more quickly, bringing quantum-device development closer to the design, verify, tape-out, characterise, and revise cycle familiar to semiconductor engineers.
Superion uses IonQ’s Electronic Qubit Control technology, derived from Oxford Ionics, to control trapped-ion qubits with electronics integrated on the chip rather than relying on laser systems for every qubit-control operation. IonQ says the underlying control structures can be manufactured using standard semiconductor processes.
That does not turn a trapped-ion computer into a conventional CMOS processor. Ions still have to be confined, transported, manipulated, and measured under carefully controlled conditions, while vacuum hardware, optics, RF electronics, control electronics, and system software remain part of the machine. Semiconductor fabrication addresses the repeatability and integration of part of that hardware stack rather than eliminating the physics surrounding the qubits.
The company says the same Electronic Qubit Control technology previously supported two-qubit gate fidelity above 99.99%. That earlier device result is relevant to the architecture but should not be treated as a Superion 256 system benchmark. Fault-tolerant performance depends on complete error rates, qubit connectivity, transport operations, measurement, control, error correction, and logical architecture rather than one gate-fidelity result.
IonQ is also presenting Superion as a data-centre platform. The company says the system fits within a standard server-rack footprint and can use conventional data-centre cooling arrangements. It also claims lower power draw than a rack of GPUs, although that is not a workload-normalised energy-efficiency comparison because classical GPU systems and quantum processors do not execute directly equivalent workloads.
The more significant electronics question is whether IonQ can retain a common fabrication and control architecture across several product generations. Superion 256 is intended to establish a chip fabric and electronic-control base that subsequent machines can extend rather than forcing the company to rebuild the hardware platform for each increase in qubit count.
IonQ is already developing Superion 10K alongside the 256-qubit system and says its first cryogenic-CMOS test chips have been produced. The larger platform is expected to integrate CMOS more deeply onto the quantum chip and is intended to become the first hardware generation built around the company’s Walking Cat fault-tolerant architecture.
Manufacturing engineering is becoming a broader issue across quantum hardware, with other developers also trying to move from individually assembled research systems towards more repeatable modules and infrastructure. IonQ’s approach differs technically, but the commercial problem is similar: a scalable architecture requires manufacturing and system integration to become reproducible rather than artisanal.
The roadmap now moves well beyond what Superion 256 has demonstrated. IonQ expects laboratory fault tolerance in 2027 and manufacturable commercial fault tolerance in 2028, while also projecting substantial cost-per-qubit reductions as electronic control replaces more laser-based hardware. The company’s own release identifies those future capability and timing statements as forward-looking.
Superion 256 itself is available to order now, with customer deliveries planned for 2027. IonQ says it pre-sold the first system during the first quarter of 2026 and also intends to offer production systems through its cloud infrastructure.
The useful milestone for electronics manufacturing is consequently narrower than the fault-tolerance roadmap. IonQ has moved a 256-qubit trapped-ion chip architecture through repeated tape-outs, foundry fabrication, integrated electronic control, and first ion trapping. Whether that process can support the far larger machines on its roadmap will depend on fabrication repeatability, yield, packaging, cryogenic electronics, ion transport, error behaviour, and system integration as much as the nominal number of qubits on the next chip.