IN Brief:
- Huawei has raised pricing for its forthcoming Ascend 950DT accelerator as HBM procurement becomes more expensive.
- Cambricon, MetaX, and Iluvatar CoreX are also adjusting prices or allocations amid constrained memory availability.
- Memory scarcity is now feeding directly into accelerator pricing, customer allocation, and Chinese AI infrastructure costs.
Huawei and other Chinese AI-accelerator suppliers are increasing processor prices as constrained high-bandwidth memory supply raises component costs and limits access to one of the most important elements of an AI compute package. The increases extend across established and smaller domestic suppliers, turning a semiconductor supply problem into a direct cost increase for companies building Chinese AI infrastructure.
Huawei has increased the expected price of its forthcoming Ascend 950DT accelerator card to more than 250,000 yuan, around $37,000, representing a rise of roughly 20% to 50% from quotations made about two months earlier. Cambricon has raised the price of its next-generation 690 processor by around 20% to 30%, while MetaX and Iluvatar CoreX are also reported to have adjusted pricing.
HBM is particularly difficult to substitute because it is designed closely with the accelerator and package. Several vertically stacked DRAM dies provide high aggregate bandwidth through a wide interface, placing memory physically close to the processor rather than relying on conventional DIMMs positioned elsewhere on a server board.
Changing that configuration affects more than memory capacity. Stack height, package routing, thermal behaviour, power delivery, controller design, firmware, and performance validation all form part of the complete accelerator implementation. A supplier cannot necessarily replace one HBM product with another late in development without additional qualification work.
Chinese accelerator manufacturers face an additional constraint because US export controls restrict access to advanced HBM. Some suppliers have turned to higher-cost procurement routes, increasing the effective memory cost before packaging, test, and board manufacture are considered.
The resulting price increases show how quickly a memory shortage can migrate through the hardware stack. An accelerator vendor can absorb some increase in component cost, but sustained rises eventually affect customer quotations, system configurations, and the amount of compute that operators can deploy within a fixed capital budget.
HBM availability is already influencing future accelerator configurations. Lower-capacity or lower-stack options can increase the number of processors that can be supplied from constrained memory output, but they also reduce local capacity and may force software to move data more frequently or distribute workloads across additional devices.
The trade-off is particularly uncomfortable for large language-model inference and training systems because memory capacity and bandwidth are closely tied to the amount of model data and intermediate state that can remain near the processor. Saving HBM at package level can therefore increase network traffic, accelerator count, rack power, or software complexity elsewhere in the system.
Older Huawei accelerators, including Ascend 950PR and 910C products, have also risen in price. That limits the ability of customers to sidestep increases on forthcoming hardware simply by returning to an established generation, particularly when existing software stacks and deployment tools already favour those devices.
Supply allocation is tightening at the same time. Iluvatar CoreX has redirected some internal GPU availability towards larger customers, including ByteDance. In a constrained market, major buyers with larger orders and longer planning horizons are better placed to secure components, while smaller customers can face longer lead times or less favourable commercial terms.
The shortage also underlines the number of manufacturing stages behind a finished accelerator. HBM depends on advanced DRAM wafer production, stacking and bonding, base-die availability, package substrates or interposers, assembly, and thermal integration. Higher accelerator wafer output cannot compensate if the memory or packaging stages remain constrained.
For domestic Chinese accelerator suppliers, that makes HBM both a technical dependency and a strategic supply-chain problem. New logic architectures may reduce reliance on imported processors, but they still have to be paired with memory capable of sustaining the bandwidth expected from competitive AI hardware.
The current pricing changes put a monetary value on that bottleneck. HBM availability is no longer an upstream purchasing issue hidden inside the bill of materials; it is shaping accelerator prices, allocation decisions, system configurations, and the economics of deploying Chinese alternatives in production AI infrastructure.
