IN Brief:
- ams OSRAM’s 850nm thin-film microVCSEL arrays use a 25µm pitch and have demonstrated error-free 32Gbps NRZ operation.
- The platform operates at approximately 0.25pJ/bit and has completed more than 2,000 hours of accelerated reliability testing without failures.
- Development is progressing towards 3D photonic stacks combining microVCSELs, photodiodes and mixed-signal CMOS for AI scale-up links.
ams OSRAM has demonstrated an addressable 850nm thin-film microVCSEL platform for highly parallel optical links in future AI systems. The company reports error-free 32Gbps NRZ operation at approximately 0.25pJ/bit, with emitters arranged at a 25µm pitch and integrated on silicon through-silicon-via substrates.
The platform takes a wide-and-slow approach to optical interconnect design. Rather than pushing a small number of optical lanes to the highest possible data rate, the architecture distributes bandwidth across larger numbers of lower-speed lanes operating in parallel. The trade-off can reduce the power and signal-conditioning burden associated with each channel while increasing the number of optical paths that have to be packaged and connected.
ams OSRAM’s current design uses top-emitting thin-film VCSELs with individual emitter addressability and compatibility with multimode fibre. The company is developing matching micro-photodiode arrays and mixed-signal CMOS electronics, with the eventual aim of producing three-dimensional photonic stacks in which emitters, receivers and control electronics are integrated more tightly than in conventional optical modules.
The company has paired the two-dimensional VCSEL array with a multi-core fibre assembly developed with BizLink for demonstration at ECOC 2026. The arrangement brings fibre alignment and connectorisation into the same development path as the emitter array. Increasing optical-lane density without matching advances in packaging and fibre routing would otherwise move the physical bottleneck from the semiconductor to the assembly around it.
At approximately 0.25pJ/bit, the reported emitter energy targets one of the main constraints emerging in accelerator interconnects. Large AI systems move increasing volumes of data over short distances between GPUs, custom accelerators and switches, and the power required for electrical signalling is rising as lane rates increase. Parallel optical architectures offer a route to shorten high-speed electrical paths while keeping individual optical channels within a more moderate operating range.
Reliability testing has so far passed more than 2,000 hours under elevated junction temperature and current stress without failures, according to ams OSRAM. The result provides an early indication of durability for the thin-film VCSEL structure, although deployment in datacentre infrastructure will require application-specific qualification alongside stable coupling performance, packaging reliability and manufacturing yield.
The platform draws on manufacturing processes developed around ams OSRAM’s digital-lighting and microLED programmes, including addressable emitter arrays, CMOS integration, wafer-level processing and advanced packaging. The company has already been extending that production base through microLED manufacturing development, while the optical-interconnect programme applies related techniques to high-speed data movement.
Array uniformity becomes increasingly demanding as emitter counts rise. Dense 25µm-pitch layouts leave little room for mechanical alignment error, and individual emitters must perform within a sufficiently narrow range for the optical system to remain balanced. Known-good-die screening, thermal management and repeatable fibre-array attachment therefore become central to commercial yield rather than secondary packaging considerations.
The architecture will also compete with several other approaches to high-bandwidth optical interconnects. Conventional pluggable modules continue to increase lane speed, while linear-drive and co-packaged optics reduce portions of the electrical path in different ways. Highly parallel microVCSEL links occupy another point in that design space, exchanging extreme per-lane speed for emitter density and lower energy per transferred bit.
ams OSRAM is now developing 3D photonic stacks that combine its microVCSEL arrays, micro-photodiodes and mixed-signal CMOS electronics. The BizLink demonstration addresses the fibre interface around those devices, while later work will have to establish repeatable assembly and system-level performance. The current 32Gbps result sets a measured starting point for that integration path rather than a complete optical-engine product.
