CMOS pixel architecture boosts simulated NIR efficiency

CMOS pixel architecture boosts simulated NIR efficiency

Researchers propose a CMOS pixel architecture improving simulated near-infrared sensitivity. FDTD modelling reaches 0.94 optical efficiency at 1000nm without increasing silicon thickness.


IN Brief:

  • A proposed CMOS pixel architecture uses geometric light trapping to increase photon propagation within silicon.
  • FDTD simulations from 400–1000nm reach optical efficiency of 0.94 at 1000nm.
  • The reported near-infrared improvement is approximately 3.7 times the conventional flat-pixel comparison, but remains unverified in fabricated hardware.

A new CMOS image-sensor pixel architecture has been proposed to increase near-infrared sensitivity by trapping photons more effectively inside silicon rather than increasing the detector thickness or introducing a different semiconductor material. Simulations show optical efficiency reaching 0.94 at a wavelength of 1000nm, approximately 3.7 times the conventional flat-pixel structure used as the comparison.

The design was developed by Mustafa Ozber Yucekul and Mahmud Yusuf Tanrikulu and published on 16 August in the Journal of Computational Electronics. It addresses a fundamental characteristic of silicon image sensors: absorption becomes weaker towards longer near-infrared wavelengths, increasing the likelihood that incoming photons pass through the active silicon without contributing to the detected signal.

The proposed architecture changes the geometry through which that light travels. It uses an optical-confinement structure to redistribute incoming photons and generate multiple internal reflections, increasing the effective path length inside the silicon while leaving the physical material thickness unchanged.

The researchers modelled the structure using finite-difference time-domain analysis across wavelengths from 400nm to 1000nm. FDTD calculates the propagation of electromagnetic fields through the pixel geometry and can account for reflection, interference, diffraction, and other optical behaviour that changes as the dimensions and interfaces inside the pixel are modified.

The simulated benefit is concentrated towards the near-infrared end of the spectrum. Optical efficiency remains broadly similar to the conventional comparison across much of the visible range, but rises substantially at longer wavelengths. At 1000nm, the proposed design reaches 0.94 optical efficiency, corresponding to an enhancement factor of about 3.7.

Increasing the optical path rather than simply increasing silicon thickness is potentially useful because a thicker absorption region introduces its own design compromises. Carrier collection distances can increase, electrical behaviour can change, and a thicker structure may conflict with pixel scaling or established CMOS image-sensor process flows.

Geometric light trapping offers another approach: retain the silicon material system and make photons travel further through the available volume. Similar concepts have appeared in previous image-sensor research using holes, gratings, cavities, and other structures intended to improve near-infrared absorption.

The important limitation is that the latest result remains computational. The paper reports FDTD simulations, not measurements from fabricated test pixels, and no experimental dataset was generated or analysed as part of the study. The 0.94 optical-efficiency value and 3.7-fold enhancement should therefore be treated as predicted optical performance rather than demonstrated sensor performance.

Optical efficiency is also only one part of a CMOS image sensor. A manufactured pixel has to convert absorbed photons into collected charge while controlling dark current, read noise, pixel-to-pixel crosstalk, full-well capacity, and other electrical characteristics. Changes to the pixel structure can improve one optical parameter while introducing process or electrical penalties elsewhere.

Manufacturing tolerances provide another test. A commercial sensor may contain millions of pixels, so the light-trapping geometry would have to be reproduced consistently across a wafer. Etch dimensions, sidewall condition, alignment, optical-stack variation, microlenses, and neighbouring pixel structures could all influence how closely fabricated devices reproduce the simulated field distribution.

The potential applications are nevertheless relevant to professional imaging. Near-infrared response is used in low-light cameras, machine vision, industrial inspection, surveillance, sensing, and systems employing active NIR illumination. Higher detector efficiency could improve signal margin or reduce the illumination power required for a given imaging task if the predicted optical improvement survives fabrication.

The paper therefore establishes a design route rather than a finished sensor technology. The next significant evidence will come from fabricated pixels, spectral measurements, electrical characterisation, and process-variation testing. Until then, the 3.7-fold result is a promising simulation of how optical confinement could extend silicon CMOS response further into the near infrared, not a measured performance claim from production hardware.


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