GlobalFoundries to manufacture AI interposers for TSMC

GlobalFoundries to manufacture AI interposers for TSMC

GlobalFoundries will produce silicon interposers for TSMC’s advanced packaging programme. The $2 billion agreement adds manufacturing capacity in New York, with volume production expected to ramp during the first half of 2028.


IN Brief:

  • A five-year manufacturing agreement valued at $2 billion covers silicon interposers for TSMC.
  • Production at GlobalFoundries in Malta, New York, will support TSMC’s CoWoS advanced packaging ecosystem.
  • Volume production is expected to begin ramping in the first half of 2028.

GlobalFoundries has reached a $2 billion manufacturing agreement with TSMC to establish production of silicon interposers at its Malta facility in New York, adding US manufacturing capacity to the advanced packaging supply chain for AI processors and high performance computing systems. The agreement has an initial five-year term, with volume production expected to begin ramping during the first half of 2028.

The interposers will support TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) packaging ecosystem, which is used to combine multiple semiconductor dies within a single high performance package. Rather than requiring all computing and memory functions to be fabricated on one monolithic die, the packaging arrangement allows separate chips to be placed close together and connected through a high density interconnect structure.

Between the processor and memory dies and the package substrate, a silicon interposer carries densely routed electrical connections. Fine metal routing structures carry signals between adjacent dies, allowing much denser connections than would normally be practical through a conventional printed circuit board. Depending on its construction, an interposer may also incorporate through-silicon vias to connect electrical signals and power connections through the thickness of the silicon.

High bandwidth memory stacks are mounted alongside large processing dies in advanced AI accelerator packages, so the interposer must support short, densely routed data paths between them. Along with signal integrity, the complete assembly must accommodate power distribution and heat removal across neighbouring components.

To supply those structures to TSMC, GlobalFoundries plans to expand manufacturing capacity at its existing Malta semiconductor facility. The planned expansion is intended to establish a US-based source of silicon interposers supporting this advanced packaging supply chain. GlobalFoundries expects the arrangement to provide a basis for further capacity increases over time, depending on customer requirements and the development of demand.

The manufacturing programme will support advanced interposer technologies including embedded deep trench capacitor components. These structures use trenches formed in silicon to provide additional capacitance within a limited area, creating opportunities to position electrical energy storage close to the devices it serves. Local decoupling capacitance can help respond to rapid changes in current demand and reduce parasitic inductance effects, although performance depends on package layout and power distribution design.

Integrating capacitance into the interposer increases the importance of coordinating electrical design with semiconductor fabrication and packaging processes. Signal routing, capacitor structures, die attachment and interconnect formation must be compatible with the selected manufacturing flow. Thermal and mechanical behaviour of the completed assembly requires consideration because the interposer sits within a package containing materials with different expansion characteristics.

GlobalFoundries already manufactures products using interposer and heterogeneous integration technologies; the TSMC agreement adds a defined customer manufacturing programme for those supporting structures. The leading-edge processor dies placed on the interposers remain separate from the scope of this manufacturing arrangement.

Separating interposer manufacturing from fabrication of the main computing chips creates another route for expanding packaging capacity. Semiconductor dies produced using different process technologies can be brought together during assembly, while supporting components and connection structures are manufactured using processes suited to their own electrical and dimensional requirements. All components must still meet tightly controlled specifications for alignment, defect levels and electrical continuity before high volume production.

The first-half 2028 production timetable allows for manufacturing preparation, process qualification and customer integration needed to establish repeatable supply. The companies have not disclosed the number of interposers to be produced, the physical extent of the capacity expansion or the manufacturing node associated with the interposer process. Those details will influence how the agreement translates into actual supply volumes across future product generations.

Although the Malta site has established semiconductor processing infrastructure, interposer output under the new agreement will depend on industrialisation, process qualification and customer integration before the proposed 2028 volume ramp. Any further expansion remains subject to future capacity requirements.

The five-year arrangement adds another manufacturing route within TSMC’s CoWoS ecosystem as demand grows for packages containing multiple logic and memory components. While production at Malta is still some distance from its planned ramp, the agreement sets out a defined investment and manufacturing relationship for a component central to advanced AI computing hardware.


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