ITRI doubles silicon-photonics engine to 3.2Tbps

ITRI doubles silicon-photonics engine to 3.2Tbps

ITRI has unveiled a 3.2Tbps silicon-photonics engine for AI networks. The design doubles its previous 1.6T generation while more than 20 partners develop supporting design, fabrication, test and packaging capability.


IN Brief:

  • ITRI’s silicon-photonics optical engine provides 3.2Tbps aggregate transmission capacity, equivalent to approximately 400GB/s.
  • The new generation doubles the stated capacity of ITRI’s preceding 1.6T engine.
  • More than 20 supply-chain partners are participating across chip design, fabrication, testing and packaging to support commercialisation.

Industrial Technology Research Institute has unveiled a 3.2Tbps silicon-photonics optical engine developed with support from Taiwan’s Department of Industrial Technology. The device doubles the aggregate transmission capacity of ITRI’s preceding 1.6T generation while a network of more than 20 partners develops the design, fabrication, test and packaging capabilities needed around the technology.

The engine provides an aggregate 3.2Tbps, equivalent to approximately 400GB/s, across multiple optical channels. ITRI is positioning the platform for AI computing infrastructure, where rising electrical lane rates are increasing loss, equalisation complexity and power consumption between processors, accelerators and switches.

Moving from 1.6T to 3.2T is not simply a matter of doubling an interface number. Optical engines combine photonic devices with drivers, receivers, electrical connections, fibre coupling and packaging, so total system performance depends on the interaction between several technologies rather than the bandwidth of the photonic integrated circuit alone.

ITRI’s broader programme reflects that complexity. Its current silicon-photonics capabilities include high-speed optoelectronic measurement across several wavelength bands, heterogeneous integration using indium phosphide, thin-film lithium niobate and polymer technologies, microLED optical-interconnect validation and fibre-optic packaging.

The use of several material systems is significant because silicon does not provide the optimum device characteristics for every optical function. Silicon is well suited to dense passive structures and established semiconductor processing, while compound semiconductors can provide more efficient optical gain. Other materials can offer stronger electro-optic behaviour for modulation. Heterogeneous integration allows designers to combine those strengths within one optical subsystem.

The manufacturing chain becomes correspondingly broader. ITRI says more than 20 companies are involved across design, wafer fabrication, testing and packaging, with international partners also contributing to specification development around 3.2T technology. Establishing that ecosystem is necessary if the engine is to move beyond research hardware into a reproducible product platform.

Production test becomes particularly difficult as optical bandwidth and channel count increase. Manufacturers need to characterise electrical and photonic behaviour together, including optical power, modulation performance, receiver sensitivity, wavelength response and conventional semiconductor parameters. Once photonic devices enter complex packages, test access also becomes more difficult and the cost of discovering a defective component rises sharply.

That pushes more screening towards wafer and pre-assembly stages. Advanced semiconductor packaging has already produced a similar shift around chiplets and high-bandwidth memory, where placing a defective die inside an expensive package can destroy the economics of the complete assembly. Silicon photonics introduces the additional problem of verifying optical as well as electrical performance before integration.

Packaging presents another constraint. Fibre coupling requires precise alignment, while temperature and mechanical stress can shift optical performance after assembly. As optical engines move closer to switching and compute silicon, their packages also have to coexist with dense electrical routing and substantial heat loads. A 3.2T throughput figure therefore brings mechanical and manufacturing challenges alongside the photonic design itself.

Taiwan’s established semiconductor ecosystem gives the programme access to extensive fabrication and advanced-packaging capability, but photonics also introduces suppliers and process steps that do not map directly onto conventional digital logic. Building a coordinated path from design through test and optical packaging is intended to close that gap.

ITRI has not announced a commercial product timetable, so the 3.2T engine remains a technology-platform development rather than a volume launch. Even so, doubling the previous generation while expanding the supporting supply chain shifts the programme towards the practical problem now facing silicon photonics: producing high-bandwidth optical hardware repeatedly and economically, rather than proving bandwidth in isolation.


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