Keysight doubles interconnect testing channels for 1.6T validation

Keysight Technologies has expanded its Functional Interconnect Test Solutions range with FITS-16CH, a digital-layer test system for optical and copper links used in high-bandwidth networking equipment. The platform provides sixteen transmit and sixteen receive channels, doubling the corresponding channel count offered by FITS-8CH. It is designed to measure error performance across complete interconnect assemblies during product development, qualification and manufacturing rather than focusing solely on an isolated component or connector.

FITS-16CH supports four-level pulse amplitude modulation, or PAM4, at electrical lane rates of 53, 106.25 and 212.5Gb/s. These rates are used to validate interconnects for networking systems operating at 400G, 800G and emerging 1.6T capacities. Aggregate link throughput still depends on how lanes are combined and on the protocol used. The sixteen transmit and sixteen receive channels are test interfaces for those electrical lanes, not sixteen separate 1.6T Ethernet network ports.

At such rates, electrical or optical compliance results do not fully describe the behaviour of a populated cable or transceiver assembly. Insertion loss, reflections, crosstalk, equalisation and connector variation can combine to create errors after signals pass through the complete path. Device-level measurements remain necessary, but they answer different questions from a test that transmits defined patterns and counts resulting bit errors. FITS-16CH adds that functional view of the assembled link to the test process.

Bit error ratio measurements report errors against the quantity of bits transmitted during the observation period. Very low error ratios require sufficient transmitted data and test duration before they can be meaningfully bounded, while results also depend on pattern, signal level, channel loading and environmental conditions. A short pass does not guarantee error-free operation in every deployment. Keysight supplies real-time BER measurements across supported channels to help compare designs and identify weak margins before assemblies enter service.

Forward error correction can be examined with Keysight’s separately offered Advanced Option. FEC allows a receiver to correct certain transmission errors, so measurements before and after correction describe different aspects of link performance. The option provides FEC statistics, including pre-FEC and post-FEC error behaviour, frame loss and symbol error analysis. A connection might deliver acceptable corrected data while approaching its correction limit, making margin measurements useful during qualification. These additional analyses should not be described as included without qualification in the base FITS-16CH chassis.

The chassis divides its sixteen transmit and sixteen receive channels into two independently usable groups, each comprising eight channels in each direction. The groups may run a combined test or separate tests using module compliance boards or compatible customer fixtures. Keysight specifies chip-to-module signalling up to 1Vp-p at industry-standard Ethernet levels, with electrical connections through coaxial interfaces. Fixture insertion loss, cabling and connector quality remain part of the measurement path and have to be considered when interpreting the errors recorded.

Keysight lists fully retimed and linear optical transceivers, active optical cables, active electrical and active copper cables, and passive direct-attach copper links among the intended test articles. These products contain different combinations of electrical conversion, amplification, digital retiming or no active compensation at all. Their error behaviour is therefore not interchangeable, even where the cable or module occupies a superficially similar port. Testing the whole assembly helps expose effects created by the interaction between internal electronics and the transmission path.

Automated transmitter equalisation is also an Advanced Option function. With compatible Keysight DCA-X equipment, the software calculates finite-impulse-response tap settings to improve the electrical eye at a measurement point. This compensates for some channel distortion; it cannot remove arbitrary noise or restore an unusably degraded path. Keysight says its automation can reduce a manual task that may take hours, days or weeks to minutes, but that comparison is a supplier claim dependent on the particular fixtures, settings and test workflow.

In production, the platform is intended for alignment checks and in-line, near-line or end-of-line error testing, with SCPI command support and reporting functions that can be linked to established test procedures. Such automation can improve repeatability when product identification, fixture condition, limits and instrument configuration are controlled. It does not independently validate test limits chosen by a manufacturer, and an electrical pass/fail record still requires a defined acceptance specification.

FITS-16CH can also be combined with Keysight data communications analysers, bit error ratio testers and UXR real-time oscilloscopes for complementary measurements. That interoperability reflects the division of work between waveform characterisation, functional error measurements and system-level traffic testing. The October announcement extends the established FITS family with higher simultaneous lane density; it does not establish new Ethernet standards or claim that FEC testing alone replaces electrical and optical compliance verification.

Keysight dates the FITS-16CH announcement to 14 October 2026 and lists a 2RU benchtop chassis under model 941-1030, alongside a separate Advanced Option under model 930-3370. The supplied information does not state a general list price or customer deployment count. Test planning still requires selection of the correct compliance boards, fixtures, optical or copper media and purchased analysis options, with final pass thresholds set against the applicable interconnect design and qualification requirements.