IN Brief:
- OpenLight's PH18DA PDK is now available within Cadence electronic design automation tools.
- Tower's InP-on-silicon platform integrates active components including lasers, modulators, and amplifiers.
- The partners are targeting 400G and 1.6T devices for optical interconnect and packaged-optics applications.
OpenLight has made its photonic process design kit for Tower Semiconductor’s PH18DA indium-phosphide-on-silicon platform available within Cadence electronic design automation tools.
The integration gives photonic integrated circuit designers access to PH18DA process information inside an established IC design environment. OpenLight supplies the photonics IP and PDK, Tower provides the foundry process and manufacturing platform, and Cadence provides the EDA environment used to design and verify devices before fabrication.
PH18DA combines active indium phosphide devices with silicon photonics, allowing lasers, modulators, and amplifiers to be integrated into a monolithic photonic IC. The platform is aimed at optical interconnects, AI infrastructure, and sensing, with the partners highlighting development of 400G and 1.6T laser-integrated devices and near- and co-packaged optics.
Dr Adam Carter, chief executive of OpenLight, said: “By making our PDK available on Cadence tools, we enable customers to design photonic integrated circuits within the same environment they rely on for advanced IC development. This integration simplifies adoption and strengthens the path from design to production on the PH18DA platform.”
A process design kit is the practical interface between a foundry technology and the engineer designing for it. It packages process-specific design rules, models, layout information, and device data so a circuit is created against a manufacturable technology rather than an abstract photonic schematic.
That becomes more important as optical interfaces move closer to processors, accelerators, and switching silicon. High-speed optical links combine photonic functions with electronic drivers, control circuits, and data-conversion devices, bringing power, packaging, thermal behaviour, and interface design into the same system problem.
Dr Samir Chaudhry, vice president of customer design enablement and reliability at Tower Semiconductor, said the approach is intended to streamline development of 400G and 1.6T laser-integrated PICs while supporting co-optimised photonic and electronic IC designs for near- and co-packaged optics.
The design-flow update arrives as Tower’s silicon-photonics business moves further into volume production. Tower reported a $680 million annualised silicon-photonics revenue run rate in the second quarter, up from $180 million a year earlier, and said it expected the figure to exceed $1 billion during the fourth quarter.
Tower also reported more than 50 customers using or developing applications around its photonics platform. At that scale, design enablement becomes part of production capacity rather than an accessory to the fabrication process. A larger design funnel increases the need for consistent models, verification, process rules, and a predictable hand-off between layout and manufacturing.
Cadence distinguished engineer Gilles Lamant said the PH18DA addition introduces integrated active devices into the company’s supported photonics processes for co-optimised electro-optical designs. That is particularly relevant where a photonic IC and its electronic companion device are being developed as one subsystem rather than as separate components joined late in the programme.
OpenLight’s current commercial activity also shows why the design environment is arriving now. The company has been developing 1.6T and 3.2T photonic products and has previously announced volume production orders for laser-integrated PICs on PH18DA. The Cadence integration gives third-party designers another route into the same process platform rather than limiting development to devices designed directly by OpenLight.
The PDK does not remove the difficult parts of photonic manufacturing. Fibre coupling, optical test, packaging, laser behaviour, thermal control, and yield still sit between a successful layout and a reliable production module. What the Cadence integration changes is the front end of that path, bringing the foundry’s active photonics process closer to the electronic design workflows already used for complex IC development.
As optical interconnect programmes move from prototypes into higher volumes, those less visible design tools become increasingly consequential. Bandwidth claims attract attention, but repeatable manufacturing depends on engineers being able to design against the process that will actually fabricate the device.
