IN Brief:
- SPARC begins with 21 collaborative projects representing more than $13 million in semiconductor research funding.
- Initial work covers transistor architectures, heterogeneous integration, analogue and mixed-signal systems, advanced packaging, manufacturing, and devices.
- Its first public solicitation attracted nearly 500 concept papers from researchers at 121 universities.
Semiconductor Research Corporation has launched the Semiconductor and Packaging Advanced Research Consortium, creating a project-based programme through which semiconductor companies can define technical priorities and jointly fund university research. SPARC begins with 21 collaborative projects representing more than $13 million in industry-backed research.
The initial portfolio spans semiconductor design, manufacturing, and packaging, with projects covering advanced transistor architectures, heterogeneous integration, intelligent analogue and mixed-signal systems, manufacturing technologies, and device development. SRC is also incorporating artificial intelligence, digital twins, experimental methods, and system-technology co-optimisation where those techniques support the underlying engineering work.
SPARC is structured around an industry-funded Research Council that identifies emerging technology challenges and selects projects against priorities defined by participating semiconductor companies. The intention is to give members a more responsive research mechanism than a programme built around a fixed multi-year subject list, while retaining the pre-competitive university research model SRC has used for more than four decades.
The first projects reflect the extent to which semiconductor performance now depends on several engineering layers being developed together. Transistor scaling remains important, but chiplets, heterogeneous integration, specialised accelerators, high-bandwidth memory, and complex package structures have increased the importance of the electrical, thermal, mechanical, and manufacturing relationships between devices.
Advanced packaging is particularly prominent because system performance increasingly depends on connections between separate pieces of silicon. Bringing processors, memory, analogue circuitry, and specialised accelerators into one package can reduce interconnect distances and increase bandwidth, but it also introduces demanding questions around power delivery, heat removal, test, reliability, and assembly yield.
Analogue and mixed-signal technology creates a different set of constraints. Digital logic may account for much of the transistor count in a modern system, but power management, sensing, RF interfaces, data conversion, and high-speed I/O remain dependent on circuits whose behaviour cannot be improved simply by applying the same scaling assumptions used for digital processing.
SPARC’s project structure allows those problems to be framed across disciplines rather than placed into isolated technology programmes. A packaging project, for example, can involve materials, thermal behaviour, interconnect architecture, manufacturing tolerances, and system requirements at the same time, while device research can be considered alongside the circuits and applications that will eventually use it.
Academic interest in the programme has been substantial. SRC says the first public solicitation attracted nearly 500 concept papers from researchers representing 121 universities. The submissions are divided across three technical tracks covering analogue and mixed-signal technologies, advanced packaging, and manufacturing and devices.
Researchers selected from the concept-paper stage will be invited to submit full proposals, with the resulting projects expected to begin on 1 January 2027. That creates a second portfolio behind the 21 projects already under way and gives the Research Council scope to adjust future selections as member companies identify different technical constraints.
The competitive structure also concentrates funding around defined engineering questions. Semiconductor research can require expensive fabrication, characterisation, packaging, and test infrastructure, so dividing relatively small awards across too many topics can leave projects unable to establish whether an approach works beyond simulation or early laboratory experiments.
Industry-led selection does not remove the longer timescales associated with foundational research. Some projects will produce approaches that are discarded, while others may take several technology generations to reach commercial products. The useful distinction is that each project begins with a technical problem identified by companies that may eventually have to manufacture or integrate the resulting technology.
The university link also gives SPARC a workforce role alongside the research output. Students working on device, packaging, manufacturing, and mixed-signal problems gain exposure to constraints being faced by semiconductor companies before entering industry, while member companies gain earlier access to research results and the engineers producing them.
With 21 projects already established and another solicitation moving towards full proposals, SPARC now has to show that its more flexible project model can respond to fast-changing semiconductor priorities without reducing university research to short-term product development. The first portfolio gives it a broad technical base; the useful measure will be how many of those projects produce methods, data, and technologies that survive contact with the manufacturing constraints they were selected to address.
