IN Brief:
- The ASC9500 is designed for photomask cleaning at mature semiconductor technology nodes from 38nm to 90nm, depending on configuration.
- An optional acid-free in-situ UV cleaning process is intended to reduce chemical consumption and associated operating costs.
- SUSS has started manufacturing the system, providing an upgrade route from its ASC5500 and manual HMx cleaning platforms.
SUSS has introduced the ASC9500 photomask cleaning system, extending its semiconductor manufacturing equipment portfolio with a configurable platform for mature technology nodes between 38nm and 90nm.
The German equipment manufacturer has begun producing the ASC9500 and identified requirements from multiple customers. The system builds on the established ASC5500 platform, incorporating an extendable architecture and cleaning capabilities previously associated with higher-end photomask equipment.
Its features include an acid-free in-situ ultraviolet cleaning option intended to reduce chemical consumption. SUSS is targeting semiconductor manufacturers using established fabrication processes, including those supplying automotive electronics, industrial devices, power semiconductors, and advanced packaging applications.
Photomasks carry the patterns used during semiconductor lithography. In an optical lithography process, the patterned mask controls the light reaching a photosensitive layer on the wafer, allowing selected structures to be transferred through subsequent processing operations.
Contamination on a photomask can interfere with pattern transfer. Depending on the size, location, and characteristics of the contaminant, an unwanted particle or residue may obscure an intended feature, produce an unintended structure, or affect the consistency of the resulting semiconductor pattern.
A photomask is used repeatedly during production, so defects that remain on its surface can affect multiple wafers before being detected and corrected. Cleaning and inspection therefore contribute to the ability to maintain stable fabrication conditions and minimise avoidable yield losses.
Removing contamination requires a process compatible with the mask materials and patterned structures. Aggressive cleaning can introduce damage or alter the characteristics of the surface, while insufficient treatment may leave residues that interfere with subsequent lithography operations.
The cleaning sequence must consequently balance contaminant removal against the preservation of the mask. Process requirements vary with the mask type, contamination chemistry, feature dimensions, and the degree of cleanliness required for the intended fabrication technology.
SUSS has developed the ASC9500 as an extendable platform rather than a system restricted to one fixed process configuration. Depending on the selected arrangement, it addresses technology nodes between 38nm and 90nm, allowing manufacturers to align the cleaning equipment with the requirements of their photomask operations.
The equipment extends the company's cleaning portfolio into a segment where manufacturers continue to rely on mature semiconductor technologies. These processes remain important for integrated circuits whose performance requirements, production economics, or established qualifications do not justify moving to the smallest available transistor geometries.
Automotive and industrial electronics frequently use such technologies for microcontrollers, analogue circuits, interface devices, and power management functions. Their continued production creates demand for photomask equipment capable of supporting established processes alongside newer manufacturing requirements.
The ASC9500 introduces cleaning capabilities previously available in SUSS's higher-end systems. Its architecture also provides an upgrade route for customers operating manual HMx cleaning equipment, although the company has not identified specific customer conversion programmes or installation schedules.
An important option is the integrated acid-free in-situ UV cleaning process. Ultraviolet-based cleaning can use light-driven reactions to assist with the removal or modification of suitable surface contaminants, reducing dependence on certain chemical treatments.
The effectiveness of the technique depends on the materials involved and the nature of the contamination. UV treatment may be suitable for selected residues but cannot be assumed to replace every cleaning chemistry required within a photomask manufacturing process.
SUSS states that the technology can reduce chemical consumption and operating costs. However, it has not published comparative consumption figures, cleaning-cycle measurements, or defect-removal results in the initial product information. The scale of any saving will depend on the selected configuration and the cleaning recipes used by individual customers.
Operating costs also extend beyond the chemicals consumed during treatment. Equipment utilisation, process duration, maintenance, inspection, cleaning effectiveness, and the effect of contamination on subsequent wafer yield all contribute to the cost of photomask processing.
Mask cleaning operations must remain repeatable across successive processing cycles. Variations in treatment conditions can influence contaminant removal and surface compatibility, making process control important where the same photomask will be reused throughout production.
The ASC9500 forms part of SUSS's broader ASx9500 photomask processing platform. The range also includes the APB9500 post-exposure bake system, which addresses a different stage of mask manufacturing by controlling material behaviour following exposure.
Cleaning and post-exposure bake operations have distinct purposes, but both contribute to maintaining reproducible photomask manufacturing conditions. SUSS is extending its equipment offering across these operations while continuing to supply specialised cleaning systems for more advanced semiconductor processes.
The company's expansion into mature-node photomask cleaning follows broader investment in semiconductor process equipment. In October, SUSS separately introduced its GreenTec wafer cleaning platform, demonstrating activity in both wafer-level and photomask-specific equipment. The two product families address different surfaces and manufacturing requirements.
Manufacturing of the ASC9500 is underway, and the company lists the new platform as available. It has not identified an initial installation customer, disclosed an order value, or published production throughput and process-yield measurements for a deployed system.
SUSS will present the equipment at SEMICON Europa in Munich from 10 to 13 November 2026. Customer qualification and subsequent production installations will establish how the configurable platform performs under the cleaning requirements of individual mature-node semiconductor processes.
