TES integrates inductorless 3.6V converter IP

TES Electronic Solutions has released a silicon-proven switched-capacitor DC/DC converter IP block for low-current system-on-chip designs, providing a regulated 3.6V output from supplies between 2.5V and 5.5V without using an external inductor.

The TS_SWC_DCDC_3V6_X8 boost-buck converter is implemented in X-FAB’s XC018 0.18µm CMOS technology and supports load currents of up to 10mA. The architecture automatically moves between buck and boost operation as the input supply moves above or below the required 3.6V output.

TES is targeting applications where the current requirement is modest enough for switched-capacitor conversion to offer a useful alternative to an inductive regulator. Sensors, mixed-signal ASICs, always-on circuitry, references, low-power control functions, and other auxiliary domains can require a stable rail while drawing far less current than a processor core or RF power stage.

A switched-capacitor converter stores and transfers energy through capacitors rather than a magnetic inductor. Switch networks reconfigure the capacitors during each operating cycle to increase or reduce voltage, allowing the converter to regulate an output while avoiding one of the largest external components associated with a conventional buck or boost stage.

TES uses pulse-skipping modulation in the control loop, with an oscillator operating at approximately 32kHz. A bandgap reference supplies the comparison voltage, while a comparator monitors the output and determines when the architecture should operate in buck or boost mode.

Removing the inductor can reduce magnetic-field emissions and release PCB area, but it does not make the supply electrically inactive. Charge-transfer pulses, switching edges, oscillator coupling, external capacitor layout, and substrate behaviour can still inject noise into sensitive circuitry. That is particularly important when the converter sits on the same die as analogue front ends or precision sensor interfaces.

The 10mA load ceiling defines the useful design space. The block is not intended to replace the higher-current regulators supplying processors, radios, motors, or other dynamically changing loads. Its value is more likely to appear where an ASIC currently needs several external passives and a small regulator simply to establish one auxiliary voltage domain.

The 2.5V to 5.5V input range also allows the converter to operate from supplies whose voltage crosses the 3.6V output during discharge or normal system operation. A buck-only converter would lose regulation once its input fell too close to the output, while a boost-only architecture would be inappropriate when the input remained above it. Automatic boost-buck operation avoids having to divide those conditions between separate conversion stages.

Integrating the converter as semiconductor IP moves several decisions from the PCB into the ASIC architecture. Designers have to consider supply partitioning, substrate coupling, start-up sequencing, clock behaviour, ESD structures, process variation, and the external capacitance needed around the finished device. The gain is that the conversion stage can be designed into the chip instead of recreated around it in every end product.

Silicon-proven status is particularly relevant for a switched-capacitor block because parasitic resistance and capacitance influence both efficiency and regulation. MOS switch behaviour, routing resistance, capacitor characteristics, leakage, and process corners can all cause physical silicon to differ from an idealised pre-layout simulation.

TES has implemented the IP in X-FAB’s mature 0.18µm XC018 process rather than an advanced digital node. That suits mixed-signal and analogue designs where higher supply voltages, analogue performance, embedded functions, and manufacturing maturity may carry more value than maximum digital transistor density.

The result is a narrow power-management block rather than a general-purpose regulator, but that is also its attraction. A 10mA auxiliary rail can be disproportionately expensive in board area and component count if it requires a discrete magnetic converter. Where the load fits the available current envelope, integrating the conversion function can reduce external circuitry while leaving the main system power architecture unchanged.

Application-level verification will still determine whether the trade is worthwhile. Efficiency across input voltage and load, ripple, transient response, external capacitor requirements, start-up behaviour, and noise coupling will matter more than the absence of an inductor alone. Silicon-proven availability gives designers a measured starting point for that evaluation rather than a simulation-only power macro.