IN Brief:
- GlobalFoundries has introduced SCALE for co-packaged optics in AI data centre architectures.
- The platform uses silicon photonics, CWDM, DWDM, micro-ring modulators, photodiodes, TSVs, and fine-pitch copper pads.
- The technology supports the shift from copper interconnects towards optical scale-up links in dense AI systems.
GlobalFoundries has introduced SCALE, a silicon photonics co-packaged optical module platform for advanced AI data centre interconnects.
SCALE, short for Silicon photonics Co-packaged Advanced Light Engine, is designed for optical scale-up architectures where bandwidth density, power efficiency, and physical reach are limiting conventional electrical interconnects. The platform is capable of meeting the Optical Compute Interconnect Multi-Source Agreement specification for modern AI scale-up systems.
The platform is built on GlobalFoundries’ silicon photonics technology and uses both coarse and dense wavelength-division multiplexing for bidirectional data transmission over each optical fibre. GlobalFoundries has demonstrated 8λ and 16λ bidirectional DWDM on the platform, supporting the move towards co-packaged optics in high-density compute environments.
SCALE includes a portfolio of qualified photonic devices, including 50Gbps and 100Gbps micro-ring modulators, coupled ring resonators, and integrated photodiodes. It also incorporates through-silicon vias for high-speed signalling and power delivery, with copper pad pitches from 110μm down to below 45μm to support 2.5D and 3D integration from organic substrates to silicon interposers.
The platform is designed to integrate electrical ICs on advanced nodes while placing optical technology closer to the compute silicon. GlobalFoundries is also using detachable fibre approaches to preserve serviceability and known-good-die testability in large-scale data centre deployments.
AI systems are placing heavy strain on interconnect architecture. Training and inference clusters depend on moving data rapidly between accelerators, memory, switches, and storage. Copper interconnects remain widely used, but their reach, power consumption, and signal-integrity limits become harder to manage as bandwidth rises and racks become denser.
Co-packaged optics reduces those constraints by bringing optical engines closer to switching or compute silicon. Shorter electrical paths can reduce losses and power, while optical links increase bandwidth density over distance. The approach also changes packaging requirements, because photonics, electrical ICs, fibre attachment, thermal control, and test strategy must be engineered as one system.
Foundry-level platforms are central to adoption. Co-packaged optics needs repeatable silicon photonics processes, packaging design rules, electrical and optical test coverage, and a path to volume manufacturing. Without that infrastructure, optical engines remain difficult to scale beyond bespoke assemblies and restricted customer programmes.
SCALE places GlobalFoundries in one of the most active areas of AI hardware development. As compute systems move towards rack-scale and cluster-scale architectures, interconnect efficiency is becoming as important as processor performance. Optical scale-up links now sit alongside advanced packaging, high-bandwidth memory, chiplets, and power delivery in the design of next-generation AI infrastructure.
