Quintauris names Pedro Lopez as CEO

Quintauris names Pedro Lopez as CEO

Europe’s RISC-V ecosystem has entered a new leadership transition phase. Quintauris has appointed Pedro Lopez as CEO as it continues work on compatible platforms and reference architectures.


IN Brief:

  • Quintauris has appointed Pedro Lopez as CEO following Alexander Kocher’s planned transition.
  • Pedro Lopez and Ozgur Ozkurt have been appointed managing directors, with Ozkurt continuing as CTO.
  • The company is developing RISC-V profiles and reference architectures for automotive, industrial, and IoT applications.

Quintauris has appointed Pedro Lopez as chief executive officer as part of a planned leadership transition for the company’s RISC-V platform work.

Alexander Kocher has stepped down from the CEO role and will continue to support the business in a strategic advisory capacity. Lopez assumed the CEO position with effect from 29 June. He and Ozgur Ozkurt have also been appointed managing directors of Quintauris GmbH, with Ozkurt continuing as chief technology officer.

The company was established to support compatible RISC-V-based platforms and strengthen collaboration across the semiconductor ecosystem. Its work focuses on RISC-V profiles and reference architectures for automotive, industrial, and IoT applications, where open instruction-set architecture adoption depends on much more than processor availability.

RISC-V has moved well beyond academic interest and early development boards. Automotive electronics, industrial controllers, edge AI systems, safety-related platforms, and connected devices are all exploring architectures that can be tailored more precisely to workload, cost, power, security, and supply-chain requirements. The difficulty lies in turning architectural flexibility into production-grade platforms with software, toolchains, safety evidence, and ecosystem confidence.

That challenge is already visible in the surrounding software ecosystem. HighTec and SiFive have strengthened safety-ready RISC-V software support, pairing qualified compiler tooling with processor IP for automotive and industrial systems. MIPS’ RISC-V work around physical AI has also placed real-time control, safety, AI acceleration, and deterministic behaviour inside the processor discussion.

Those developments show the scale of the ecosystem problem Quintauris is addressing. RISC-V’s openness gives semiconductor companies more freedom to implement workload-specific processors, but end users still need compatibility, long-term support, qualified software, verification routes, middleware, operating-system support, and predictable migration paths. Fragmentation supports innovation only when common layers exist where the market needs them.

Automotive remains the hardest proving ground. Vehicle platforms demand functional safety, cybersecurity, real-time performance, long programme lives, supplier traceability, and tool confidence. A processor architecture can be attractive on paper and still fail to reach production if compilers, debuggers, operating systems, safety manuals, reference designs, and compliance evidence remain immature.

Industrial electronics shares many of those constraints, particularly in control, robotics, energy, and automation systems. Long operating lives, constrained certification windows, and the cost of revalidation make platform stability as valuable as processor flexibility. Reference architectures can reduce repeated integration work and give suppliers a clearer foundation for specialised implementations.

The IoT market adds another dimension. Low-power devices, gateways, secure elements, sensor nodes, and edge-AI modules can benefit from scalable open architectures, but they are cost-sensitive and often developed by teams with limited appetite for assembling fragmented toolchains. Complete implementation routes matter as much as instruction-set openness.

Quintauris’ leadership change arrives at an important point for European processor strategy. Europe has strong positions in automotive electronics, industrial systems, embedded software, safety-critical engineering, and semiconductor research, while many product categories still depend on external processor ecosystems. RISC-V gives the region another lever if the implementation path is credible.

Lopez’s task will be to turn industry collaboration into usable platform infrastructure. The company’s shareholder-backed model gives it a role between individual processor suppliers and downstream customers that need compatibility. That role is not glamorous, but it is essential if RISC-V is to move from design option to dependable production route.


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