IN Brief:
- Arm becomes EuroCDP’s first commercial IP provider under a strategic framework agreement supporting the European Chips Act initiative.
- Arm Flexible Access will provide participating teams with processor IP, tools, training and commercial frameworks before final production commitments.
- EuroCDP is combining commercial IP, EDA resources and design-support teams to lower barriers between European chip concepts and tape-out.
Arm has joined the European Chips Design Platform as its first commercial intellectual-property provider, adding processor IP, development tools, training and licensing frameworks to an EU-backed route for European custom-silicon projects. The agreement is intended to support start-ups, SMEs and research teams from architecture exploration through to tape-out.
EuroCDP is funded through the European Chips Joint Undertaking and is designed to reduce the technical and commercial barriers encountered by smaller semiconductor design teams. Fabrication is only one part of that process. Commercial IP licensing, electronic design automation, verification, design data and specialist engineering support can require substantial investment before a first wafer order is placed.
Arm will make technology available through Arm Flexible Access, allowing participating teams to evaluate and design with a portfolio of processor and system IP before committing to production licences for a final implementation. The programme also provides tools, training and technical resources intended to support the earlier stages of system-on-chip development.
As of June 2026, Arm said Flexible Access had more than 300 active members worldwide and had supported more than 400 tape-outs. Qualifying early-stage semiconductor companies can use Arm Flexible Access for Startups without an annual access fee, subject to eligibility criteria, while non-commercial university projects can use Arm Academic Access.
Those routes allow design teams to test processor architectures, build software and assess surrounding subsystem requirements before making larger commercial commitments. That is particularly useful for small fabless businesses, where licensing and engineering expenditure during architectural exploration can consume capital well before a product has demonstrated technical or commercial viability.
The agreement follows Keysight’s addition of EDA software and training to EuroCDP earlier this month. The two suppliers occupy different parts of the design flow. Keysight contributes RF, electromagnetic, high-speed digital and device-modelling tools, while Arm adds processor IP and a software ecosystem used across a broad range of embedded and computing systems.
EuroCDP is also establishing Design Enablement Teams to provide engineering support during SoC development. Arm says several of those teams are Arm Approved Design Partners with experience building and validating Arm-based systems. Their work can extend into interconnects, memory architecture, peripheral integration, security, power management, verification and software bring-up after the processor core has been selected.
European semiconductor policy has concentrated heavily on manufacturing capacity, but chip design operates under a different set of constraints. A region can add wafer-fabrication capacity while remaining dependent on externally developed architectures, EDA software and design-service expertise. Fabless companies, meanwhile, can build valuable products without owning manufacturing assets if they can reach proven IP, tools, packaging and fabrication processes on commercially workable terms.
Arm’s installed base gives EuroCDP participants an established software and development environment. The company says more than 350 billion Arm-based chips have shipped and its developer ecosystem exceeds 22 million people. That does not remove the engineering needed to differentiate a new SoC, but it reduces the amount of processor-specific software infrastructure a start-up has to build before concentrating on accelerators, interfaces, memory systems and application functions.
The commercial model also delays some licensing decisions until teams have tested their design direction. Semiconductor start-ups can spend heavily during verification and prototyping, so earlier access to IP under standardised frameworks can leave more capital available for engineering work. Common contractual routes can also reduce the procurement and legal overhead faced by companies that do not yet have large internal commercial teams.
EuroCDP will ultimately be measured by the number of projects that progress from evaluation into tape-out and commercial production. Adding processor IP alongside EDA resources and design-support teams gives the platform another piece of that route, with European chip developers able to evaluate established compute architectures within the same framework used to prepare designs for fabrication.
