IN Brief:
- Lumentum, Astera Labs and Corning are combining 1060nm VCSEL arrays, a Scorpio switch and multimode fibre.
- The demonstration is designed around multiple 32Gb/s NRZ channels carrying PCIe over optical links.
- An error-free PCIe 5 connection is a stated demonstration objective, not a production reliability qualification.
Lumentum, Astera Labs and Corning plan to demonstrate an optical PCIe link within an AI computing rack at the 2026 OCP Global Summit. The arrangement combines Lumentum’s 1060nm VCSEL optical engine, Corning multimode fibre and an Astera Labs Scorpio Smart Fabric Switch. The proof of concept is designed around multiple 32Gb/s non-return-to-zero (NRZ) optical channels and an error-free PCIe 5 connection, which remains a stated demonstration objective.
PCI Express normally carries traffic over electrical connections between processors, accelerators and other devices. The longer those connections extend beyond a circuit board, the more demanding it becomes to manage attenuation, crosstalk and routing density. Retiming can preserve signal quality but introduces extra components and power consumption. Moving part of the physical path into fibre changes those constraints while adding optical transmitters, receivers and coupling assemblies.
In the proposed link, electrical signals are converted into light for transmission through several parallel fibre channels and reconstructed at the destination. Lumentum provides vertical-cavity surface-emitting laser arrays and photodetectors. The lasers emit perpendicular to the wafer surface, enabling densely packed two-dimensional arrays when the package offers suitable optical alignment. That geometry is useful for distributing an electrical link across many optical channels without using a large discrete laser unit for every lane.
The 1060nm optical engine incorporates backside lens technology on transmitter and receiver arrays. Its packaging must couple light efficiently into the chosen fibre geometry while maintaining alignment across many channels. The partners have not published an optical loss budget, measured coupling tolerance or complete module power figure, so those engineering parameters cannot yet be compared quantitatively with a specific copper-cable system.
Corning supplies the multimode fibre connection. Such fibre can support several propagation modes, making wavelength, fibre characteristics and link length important to channel performance. A stated 32Gb/s NRZ optical lane rate does not, by itself, establish aggregate system throughput: the number of active channels, coding overhead and the electrical interface on either side of the optical engine must also be accounted for.
Astera Labs’ Scorpio Smart Fabric Switch supplies the switching function around which the experiment is built. By retaining the PCIe architecture while replacing part of the physical transmission medium, the partners seek to extend connectivity inside the rack without developing a new application-level interconnect. Maintaining that architecture still demands correct link training, timing and error handling; the optical devices alone cannot guarantee the behaviour of a finished multi-device system.
Sustained PCIe link integrity would need testing across changing temperatures, ageing conditions, link lengths and equipment from different suppliers. Field serviceability, interoperability and long-term bit error rates will require separate qualification before the approach can be specified for operational racks.
Fibre can reduce routing congestion compared with large copper bundles, but optical conversion introduces drivers, receivers, alignment hardware and cooling requirements. Evaluating energy consumption therefore requires measurements across the complete electrical and optical path, including the equipment at both ends of the link.
The proposed rack-level PCIe 5 link uses a different protocol boundary from Lumentum’s optical component work and its September demonstration with Qualcomm and Corning. The latter focused on die-to-die interfaces, including possible compatibility with UCIe, whereas the new setup uses a Scorpio switch and tests a PCIe 5 connection within a representative rack. The protocol boundary and physical integration objectives are therefore different.
Producing such an optical assembly at volume would require repeatable placement and testing of VCSEL arrays, photodetectors, lenses and fibre terminations. Temperature changes and mechanical handling can affect optical alignment, while repairability influences rack maintenance. The companies have not disclosed production yields, module pricing, connector insertion losses or a shipping timetable for the joint PCIe design.
The partners plan to show the assembly at the Astera Labs booth during the OCP Global Summit in San Jose on 12–15 October. Product development will depend on repeatable optical alignment, electrical interoperability, thermal qualification and practical service procedures for a PCIe link spanning rack equipment.
