IN Brief:
- Vector Line Capital has invested $75m in Hero Electronix company Tessolve, joining existing backers TPG and Novo Tellus.
- Tessolve says it is in advanced discussions concerning several acquisitions but has not disclosed targets or transaction terms.
- Its semiconductor engineering business spans chip architecture, design, silicon validation, test development and embedded systems.
Tessolve Semiconductor has secured a $75 million investment from US-based Vector Line Capital as it prepares to expand its chip engineering operations through acquisitions. Vector Line joins TPG and Novo Tellus among the backers of the Hero Electronix company. Tessolve says it is in advanced discussions with several potential targets and aims to complete transactions over the next couple of quarters, but has not identified the businesses concerned or disclosed the terms of any proposed purchases.
The investment became public on 11 October and was confirmed by the company the following day. It follows a period in which Tessolve has extended its services beyond silicon testing into chip architecture, logic and mixed-signal design, verification, validation and embedded development. The company is seeking additional capabilities rather than announcing a new semiconductor fabrication plant, and no specific manufacturing site has been committed under the investment.
Chip architecture, design verification and post-fabrication testing answer different engineering questions and require specialised personnel and equipment. Architecture establishes the functions and interfaces a device must support; design and verification turn those requirements into circuits and test whether the proposed implementation behaves as intended. Following fabrication at a foundry, silicon validation and production testing examine whether actual devices satisfy electrical and functional limits. A successful simulation does not by itself establish that a manufactured chip will meet those limits across process and operating variations.
Analogue and mixed-signal projects add further characterisation challenges because timing, distortion, noise and electrical tolerances interact with digital logic. An AI processor or other large SoC must also manage memory interfaces, power distribution, package connections and the software needed to initialise and exercise its subsystems. Development services can address these requirements without owning wafer fabrication, although customers still have to qualify test methods, design tools and intellectual property used in each programme.
Tessolve describes pre-engineered semiconductor platforms and established design flows that support its work on AI and high-performance computing chips. The business also reports relationships with foundries, intellectual property suppliers, electronic design automation developers and test equipment providers. Such arrangements allow engineering teams to work within the process and interface requirements of different customers. They are not evidence that one design can be carried unchanged between process nodes or that all tools and tests are interchangeable.
Tessolve reports more than 3,500 engineers across ten countries and nine laboratories globally. It says its clients include 18 of the world’s 20 largest semiconductor companies, a company-supplied customer coverage figure without independent verification. The staffing, laboratory capacity and specialist capabilities that could be added remain unknown because none of the proposed acquisitions has been announced.
The group’s European operation includes Dream Chip Technologies in Germany, which identifies itself as part of Tessolve. Dream Chip specialises in custom SoCs, imaging technology, FPGA work and embedded systems for applications including automotive and high-performance computing. The German business already supplies specialist design capability within Tessolve’s international organisation. Any addition to its engineering remit or staffing would depend on the companies ultimately acquired and the group’s integration plans.
Vector Line’s investment follows TPG’s $150 million funding commitment announced in September 2025, which was intended to support delivery centres, testing laboratories and acquisitions. Novo Tellus invested $40 million in the company in 2021. Those figures describe separate investment announcements, not Tessolve’s valuation or the amount of unrestricted cash available for future transactions. The investor’s equity percentage, Tessolve’s valuation and the division between newly issued capital and any other transaction proceeds remain undisclosed.
Vector Line specialises in semiconductors and their supply chain, and describes Tessolve as its first investment in India. The investor’s founder, Geoffrey Baldwin, has a background in technology mergers and acquisitions. For Tessolve, bringing additional specialist design or test teams into a common delivery organisation could reduce some handovers during chip development, but integrating engineering processes, tool licences, quality systems and customer programmes creates its own work. The commercial benefit will depend on which businesses are acquired and how their expertise is incorporated.
Srini Chinamilli, Tessolve’s co-founder and chief executive, has positioned the proposed acquisitions as a means of expanding the group’s technical offering. Signed transactions and additions to qualified design or testing capacity will determine the technical scope and geography of the expansion. Those milestones will also show how Tessolve allocates the newly secured funding.
