Applied Materials lifts outlook after record quarter

Applied Materials lifts outlook after record quarter

Applied Materials reports record revenue as semiconductor equipment demand strengthens. DRAM, leading-edge logic, advanced packaging, and collaborative R&D are supporting further capacity investment.


IN Brief:

  • Applied Materials reported Q3 revenue of $9.12 billion, 25% higher year on year.
  • Semiconductor Systems revenue reached $7.04 billion as DRAM and advanced packaging demand increased.
  • The EPIC Center has expanded to 11 R&D engagements with chipmakers, universities, and technology partners.

Applied Materials has reported record quarterly revenue of $9.12 billion as spending on DRAM, advanced logic, and packaging increases the amount of process equipment required around AI-oriented semiconductor manufacturing.

Revenue for the company’s third fiscal quarter rose 25% year on year from $7.30 billion to $9.12 billion. GAAP operating income reached a record $3.08 billion, while net income increased to $2.54 billion.

Its Semiconductor Systems division generated $7.04 billion of revenue during the quarter, up from $5.56 billion a year earlier. Foundry, logic, and other applications accounted for 67% of that business, DRAM for 26%, and flash memory for 7%.

The figures provide a useful measure of semiconductor manufacturing activity because Applied supplies deposition, materials engineering, polishing, plating, metrology, and other equipment used throughout a fabrication flow. Equipment demand is influenced not only by wafer volumes but also by the number and difficulty of individual process steps required to manufacture each device.

Applied expects continued strength in DRAM, leading-edge foundry logic, and advanced packaging. Each is being pulled by AI infrastructure, although the manufacturing requirements differ considerably between them.

DRAM investment increasingly includes high-bandwidth memory. HBM places multiple thin memory dies into closely integrated stacks, requiring accurate wafer processing, through-silicon vias, bonding, and packaging alongside the fabrication of the memory cells themselves.

Applied has recently introduced equipment aimed specifically at those production steps, including systems for transistor engineering, chemical mechanical polishing, copper electroplating, dielectric deposition, and metrology. The company says some of the tools address the uniformity and mechanical-stability requirements created by hybrid bonding and increasingly tall HBM stacks.

Leading-edge foundry logic brings a different set of process demands. New transistor structures, tighter interconnect dimensions, and changes to power delivery require material to be deposited and removed with increasingly selective control, while process variation becomes harder to tolerate as structures shrink or become more three-dimensional.

Advanced packaging then brings the logic and memory devices together. The performance of an AI accelerator increasingly depends on the physical integration of compute dies, high-bandwidth memory, interconnects, substrates, and power delivery, placing packaging equipment much closer to the centre of semiconductor performance than it occupied in earlier generations.

That shift increases the value of manufacturing processes that might previously have been considered primarily back-end operations. Wafer thinning, bonding, plating, polishing, and package-level metrology can influence the yield of assemblies containing several individually valuable dies.

The capital required by equipment suppliers is increasing at the same time. A modern semiconductor tool can combine precision mechanics, vacuum technology, gas or chemical delivery, RF power, sensors, process control, and specialised electronics supplied by a broad network of component manufacturers.

Applied says it is making additional manufacturing-capacity investments to support projected demand through the end of the decade. Greater visibility from semiconductor customers helps with that planning, but it also leaves equipment companies exposed when fab schedules or memory cycles change after capacity has already been committed.

Research infrastructure forms the other side of the company’s current expansion. Applied says its EPIC Center has grown to 11 engagements involving chipmakers, universities, and technology partners.

UC Berkeley’s participation in the centre was announced separately earlier in August, while Applied’s quarterly update places that work within a larger collaborative R&D model. Other engagements include work involving Broadcom and SCREEN Semiconductor Solutions.

That distinction is relevant because semiconductor processes can no longer be developed effectively as isolated equipment steps. Cleaning, deposition, etch, inspection, packaging, and later thermal processes interact with one another, so a change that improves one operation can create problems elsewhere in the flow.

Collaborative development environments are intended to expose those interactions earlier. A process can be run alongside customer device requirements and partner technologies before it is transferred to a production fab, reducing the risk that an apparently successful laboratory result fails when placed into a complete manufacturing sequence.

Applied reported Semiconductor Systems operating income of $2.66 billion for the quarter, with operating margin rising to 37.7% from 33% a year earlier. Those figures underline how strongly current equipment demand is translating into the supplier’s results, although semiconductor capital spending remains historically cyclical.

The more durable engineering question is whether AI infrastructure continues to increase process intensity even when wafer demand changes. HBM stacks, chiplets, advanced packaging, and leading-edge logic all require more manufacturing interactions to be controlled across a finished system, and each additional interface creates another opportunity for yield loss.

Applied’s record quarter therefore reflects more than a temporary increase in fab equipment orders. The company is benefiting from a manufacturing problem that is becoming structurally more complicated: AI chips need increasingly sophisticated process technology not only inside each die, but across the package that connects those dies into one computing system.


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