IN Brief:
- Cadence and Analog Devices have jointly developed the SHARC-FX DSP core for the ADSP-SC84x/2184x automotive processor platform.
- The architecture moves from 28nm to 16nm and is claimed to deliver five times the performance of the previous SHARC+ core.
- LPDDR4, increased L2 memory, a hardware security module, and optional connectivity cores extend the processor beyond conventional automotive audio workloads.
Cadence and Analog Devices have jointly developed the SHARC-FX digital signal-processing core for ADI’s next automotive audio processors, combining Tensilica technology with a move from 28nm to 16nm manufacturing.
The core will be used in the ADSP-SC84x/2184x platform, succeeding the ADSP-SC59x/2159x family. Cadence says SHARC-FX delivers five times the performance of the previous SHARC+ core while adding features for AI-assisted audio, voice processing and other computationally demanding in-cabin functions.
Automotive audio processing now extends well beyond routing music between a source and loudspeakers. Premium systems can run road-noise cancellation, engine-order cancellation, acoustic vehicle alerts, immersive rendering, personal sound zones and multi-microphone voice processing at the same time.
Those applications combine high DSP throughput with strict latency requirements. Newer functions are also introducing neural-network workloads for speech enhancement, source separation and classification, creating pressure to support conventional signal processing and AI inference within the same electronic architecture.
SHARC-FX uses technology from Cadence’s Tensilica DSP portfolio and supports an enhanced VLIW SIMD architecture, additional data types, more efficient cache operations and expanded instructions for signal-processing and AI workloads.
Analog Devices can also use Tensilica Instruction Extension technology to add custom instructions for proprietary algorithms. That gives the processor architecture a way to accelerate specialised workloads without moving every operation onto a separate fixed-function block.
The ability to mix conventional DSP and neural-network processing is becoming increasingly valuable in the vehicle cabin. Filters, transforms and control loops continue to require predictable real-time execution, while AI models can be more computationally irregular and dependent on matrix or vector operations.
Cadence says the new architecture supports optimised neural-network kernels for frameworks including Google’s LiteRT. Keeping selected inference workloads on the DSP can reduce the amount of processing that has to be passed to a central vehicle computer, leaving that processor available for operating-system and domain-control tasks.
The surrounding ADSP-SC84x/2184x platform also receives a substantial hardware update. Moving from 28nm to 16nm improves the scope for higher operating frequency and greater integration while controlling power density, although final efficiency will depend on the individual device configuration and workload.
The processors add an LPDDR4 memory interface, increased on-chip L2 memory and a dedicated hardware security module. Two optional connectivity cores are also planned, providing communications functions and mainline Linux support.
Those additions move the platform beyond the traditional role of an isolated audio DSP. A modern vehicle processor may have to exchange data with zonal controllers, infotainment systems and central compute platforms while still running deterministic audio and voice workloads locally.
Security becomes more relevant as those interfaces expand. A dedicated hardware security module gives the processor a separate resource for functions such as protected key storage and cryptographic operations, although the security of the final system still depends on software architecture and integration across the complete vehicle network.
The software environment remains central to adoption. Cadence compiler tools will sit alongside ADI’s CrossCore Embedded Studio, SigmaStudio+ and EZ-KIT hardware, while third-party platforms including DSP Concepts’ Audio Weaver are also part of the ecosystem.
That continuity matters because automotive audio algorithms represent substantial existing engineering investment. A faster core offers limited benefit if production software has to be rewritten from scratch or if validation cannot be carried across to the new generation efficiently.
Cadence states that its automotive-ready Tensilica DSP IP can be certified up to ISO 26262 ASIL-B. The announcement does not state the final functional-safety classification of the complete ADSP-SC84x/2184x devices, so the distinction between underlying IP capability and product-level qualification remains important.
The fivefold performance claim is the headline figure, but the larger shift is architectural. ADI’s next SHARC generation is being designed to run established real-time audio algorithms and newer AI workloads on the same platform, with more memory, security and connectivity around the DSP core as cabin electronics become part of a wider software-defined vehicle system.
