IN Brief:
- Maverick Silicon has fully funded Celera Semiconductor’s $30 million Series B round.
- Capital will support analogue IC automation, customer programmes, and power-management development.
- Celera is combining its Nesto design platform with additional engineering capability gained through its SiliconGate acquisition.
Celera Semiconductor has closed a $30 million Series B financing round to expand its analogue IC design automation platform and support additional customer programmes. The round was fully funded by Maverick Silicon, already the company’s largest investor, and follows Celera’s acquisition of Portugal-based SiliconGate earlier this year.
Celera is building a software-led development flow around its Nesto technology, which creates digital representations of analogue functions that can be configured and reused during IC development. The company is applying the approach to standard and custom analogue products, including power-management devices, while expanding engineering activity in California, Lisbon, and Porto.
The new capital will support product development, customer projects, and further automation of the design process. Celera’s June acquisition of SiliconGate added an established analogue design team and more than 900 silicon-proven IP designs, giving the software platform a larger body of existing circuit knowledge to draw on.
Analogue design remains far less automated than digital implementation. Logic synthesis and place-and-route tools can translate high-level digital descriptions into large transistor networks with well-established verification flows, whereas analogue performance depends directly on transistor sizing, device matching, parasitic capacitance and resistance, noise, stability, temperature, supply variation, and physical layout.
Those relationships make analogue circuits difficult to abstract. A block that performs correctly in one process technology may need substantial redesign when moved to another foundry or voltage range, and apparently small layout changes can affect offset, bandwidth, distortion, or stability. Automation therefore has to preserve enough device-level detail to predict manufactured behaviour rather than simply generate a schematic quickly.
Celera’s approach is to make proven analogue functions more reusable and to automate parts of the development flow around them. A larger library of validated building blocks can reduce repeated engineering effort, particularly for power, interface, sensing, and mixed-signal circuits that share familiar functions even when the final specifications differ. The commercial test is whether that reuse can shorten design cycles without reducing control over performance corners and physical implementation.
The SiliconGate acquisition expands that base with nearly two decades of power-management and analogue design experience in Portugal. The combination gives Celera a larger engineering team to validate and adapt automated outputs, which remains important when models, process behaviour, packaging parasitics, or customer requirements fall outside previously characterised conditions.
Many of the target devices are also built on mature process nodes rather than the most advanced digital geometries. Power-management ICs, sensor interfaces, industrial analogue, automotive circuits, and battery-powered products often prioritise voltage handling, precision, noise, reliability, qualification, and long product life over transistor density. Development cost and engineering availability can therefore become larger constraints than access to leading-edge lithography.
Celera says its operating model extends beyond design software to a manufacturing route through foundry and assembly partners. That places the company closer to an analogue product supplier than a conventional EDA vendor, because customers can use the design flow as part of delivering fabricated and packaged devices rather than stopping at a design tool or IP block.
Maverick Silicon also funded Celera’s earlier $20 million Series A round, making the latest investment a continuation of an existing relationship rather than a new investor entering the business. The larger financing follows a period in which Celera has added engineering, manufacturing, sales, and supply chain personnel alongside the SiliconGate acquisition.
The $30 million round gives Celera more capacity to test its central proposition at scale: combining a larger library of proven analogue IP, experienced circuit designers, and software automation to make custom analogue development more repeatable. Every design still has to survive process variation, layout parasitics, qualification, packaging, and production test once it leaves the software environment and reaches silicon.
