IN Brief:
- The Performance Line combines a 180MHz Cortex-M33 application core with dedicated acceleration for demanding real-time control.
- PQC support includes SHA-512 and LMS verification for secure boot and firmware updates, with PSA Level 3 certification still planned.
- Power and motor variants target server PSUs, EV charging, solar, telecommunications, robotics, and wide-bandgap conversion systems.
Infineon Technologies has launched its PSOC Control C3 Performance Line microcontrollers for high-speed digital control in power conversion and motor applications, moving the family into sample availability with dedicated devices for demanding power and motor designs.
The Arm Cortex-M33-based family is aimed at systems where control-loop latency, analogue accuracy, and switching speed directly affect conversion efficiency and power density. Infineon is positioning the devices for AI server power supplies, switched-mode power supplies, telecommunications infrastructure, solar equipment, EV charging, robotics, and higher-end motor control, with the architecture designed to work alongside wide-bandgap power stages.
The Performance Line runs its main Cortex-M33 core at up to 180MHz and adds dedicated acceleration for real-time control. Power-focused devices use a programmable power control accelerator built around dual Cortex-M33 cores operating at up to 200MHz, separating time-critical control functions from housekeeping and communications workloads. High-speed analogue and digital peripherals, high-resolution PWM generation, and fast data-converter support shorten the path between measuring an electrical event and changing the switching response.
That division becomes more useful as converter switching frequencies rise. The general-purpose core can handle system functions while the accelerator executes inner control loops with deterministic timing, reducing the need to sacrifice control bandwidth to firmware overhead. Wide-bandgap switches intensify the requirement because their higher switching speeds leave less tolerance for delayed or imprecise control.
Security is built into the same architecture. The Performance Line supports firmware-protection requirements associated with the Commercial National Security Algorithm Suite 2.0 and includes SHA-512 and Leighton-Micali hash-based signature support for secure boot and firmware-update verification. Secure firmware update, code protection, attestation identifiers, protected key storage, authenticity checking, and integrity protection are also included across the family.
Infineon describes the devices as PSA Level 3 ready, rather than already PSA Level 3 certified. Its current product material lists certification as planned, keeping the hardware architecture and the formal certification process distinct. Post-quantum firmware protection is particularly relevant to industrial equipment expected to remain deployed for many years, where signed firmware and secure update mechanisms may have to remain trustworthy through changes in cryptographic requirements.
The portfolio is divided between power-conversion parts, including PSC3P8 and PSC3P7 devices, and motor-control variants including PSC3M8 and PSC3M7. Multiple package options extend to 100 pins, allowing I/O, memory, peripheral content, and performance to scale within a common control platform. Infineon lists configurations with up to 512KB of flash and up to 240KB of ECC-protected SRAM across the Performance Line.
Development is tied to ModusToolbox, with Power Suite and Motor Suite providing graphical configuration, control libraries, and real-time parameter monitoring. The software environment is intended to carry control implementations across devices in the family while exposing the timing, analogue, and accelerator features used in high-frequency conversion.
The controller family also extends Infineon’s existing power semiconductor work around AI infrastructure. The company has recently introduced compact dual gate drivers for dense server power conversion, while the Performance Line addresses the programmable control layer above switching devices and gate-drive circuitry. The combination gives power designers a route across controller, driver, and semiconductor functions without making those separate devices dependent on one fixed converter topology.
Samples of the PQC-capable Performance Line are available now. Qualification in complete converters will determine how effectively the accelerator, analogue peripherals, security functions, and development tools translate into control bandwidth and efficiency at the switching frequencies targeted for server power supplies and wide-bandgap systems.
