IN Brief:
- Siemens is expanding its agentic EDA programme to electrical and thermal analysis of 3D integrated circuits.
- Nine automated stages link seven engineering tools for package design, power analysis, and simulation.
- Benchmarks indicate up to 95% less engineering effort, 99% less setup time, and 50 times more design exploration.
Siemens has expanded its NVIDIA-supported electronic design automation programme to coordinate electrical and thermal analysis of three-dimensional integrated circuits, using AI agents to run connected engineering tools and examine alternative package configurations.
The new workflow links nine automated stages across seven Siemens EDA products. It builds on the Fuse EDA AI Agent introduced earlier in 2026 and applies agent-driven design exploration to semiconductor assemblies in which power distribution, die placement, package materials, and heat removal must be assessed together.
Three-dimensional integrated circuits bring semiconductor dies and supporting structures into closely integrated packages. Their arrangement can shorten some electrical connections and accommodate greater functional density, but it also concentrates power consumption and complicates heat transfer. The location of a die, for example, affects its thermal surroundings as well as the electrical paths used to supply power and communicate with other devices.
Thermal changes can influence electrical operation. Conductor resistance and device power consumption vary with temperature, while electrical losses generate additional heat that must pass through package materials and the surrounding cooling system. An apparently favourable layout in one simulation may consequently perform less well once electrical and thermal behaviour are considered together.
Resolving these interactions traditionally requires specialists to coordinate design, power analysis, thermal modelling, parasitic extraction, and circuit simulation. Results must be transferred between tools as engineers revise material selections, operating assumptions, and package layouts. The number of possible combinations can exceed what a team can investigate within its available development schedule.
Siemens is using its Fuse EDA AI Agent, integrated with Intelligence Center X, to organise these iterations. An engineer establishes objectives and constraints, after which the agent launches analyses, compares their results with the defined targets, and identifies where the design falls short. It can then investigate whether a problem is associated with power delivery, component placement, package materials, or their combined effects.
The connected toolchain includes Innovator3D IC Integrator for package assembly and floorplanning, Solido Characterizer for library characterisation, and mPower Digital for power analysis. Calibre 3DThermal and Simcenter FloTHERM contribute thermal modelling, while Calibre xACT extracts temperature-dependent parasitics and Solido SPICE supports electrical simulation.
Each tool continues to address a defined engineering function. The AI agent coordinates their execution and interprets results to select subsequent analyses; it does not replace the underlying physical models. Siemens describes the approach as self-verifying because candidate configurations are evaluated with established simulation and signoff tools rather than accepted solely on the basis of an AI-generated suggestion.
A particular investigation might change the assumed heat transfer coefficient at a package boundary, vary the power delivered to individual dies, or test an alternative material stack. The effects can be checked through further electrical and thermal simulations, allowing trade-offs to emerge before an implementation is finalised. Accurate input data and appropriate boundary conditions remain essential to the value of those comparisons.
Siemens reports that a typical automated cycle takes eight to ten hours and involves 50 to 100 AI reasoning steps. The workflow can explore more than 200 to 500 design points during a cycle, including variations in thermal conditions, power budgets, and materials. Those figures describe the company’s reported workflow capability rather than a guaranteed throughput for every chip design.
Benchmark studies produced three separate performance claims. Siemens reports up to 95% less engineering effort, up to 99% less workflow setup time, and up to 50 times greater design exploration coverage than conventional manual processes. The setup comparison involves reducing preparation across seven tools from several days to typically less than five minutes; the broader engineering effort figure compares work that previously took multiple weeks with an automated process lasting hours.
These measurements should not be confused with reductions in elapsed simulation time or with improvements in semiconductor power efficiency. They describe the coordination and scope of the design process under the benchmark conditions. Siemens has not provided independent production project results demonstrating that every development team will obtain comparable savings.
NVIDIA technology supplies accelerated computing and the agent framework used by the workflow. Siemens identifies NVIDIA Agent Toolkit, Nemotron models, and CUDA-X libraries, alongside functions for monitoring agent activity and protecting proprietary design information. NVIDIA OpenShell provides a sandboxing mechanism for agent execution, an important consideration where tools access semiconductor intellectual property and foundry process design kits.
The company also plans agentic workflows across other design stages, including RTL development, verification, physical implementation, and test. The current 3D IC programme concentrates on coupled power and thermal analysis, where a wider search of technically viable designs may expose constraints earlier in the process.
Additional demonstrations are being presented at NVIDIA GTC Berlin, but Siemens has not given a comprehensive general availability timetable for the new capabilities. Their application to commercial chip programmes will depend on solver accuracy, integration with established design procedures, and the resources required to run repeated analyses across complex package structures.
