SK hynix starts Indiana HBM packaging build

SK hynix has broken ground on a more than $4 billion advanced packaging facility in West Lafayette, Indiana, establishing its first US production base for high-bandwidth memory. The plant will receive advanced wafers manufactured in South Korea for packaging and testing before finished HBM is supplied to US customers.

The groundbreaking took place on 27 August local time at Purdue University. SK hynix plans to open the cleanroom by October 2028 and begin mass production of next-generation HBM in the second half of 2029, with around 1,000 people expected to work at the facility once commercial operations are under way.

The location changes an important part of the HBM manufacturing chain without relocating the whole process. Front-end wafer fabrication will remain in South Korea, while Indiana takes on advanced packaging and test, creating a production route in which high-value back-end processing moves closer to major US AI infrastructure customers.

That back-end work has become progressively more demanding as HBM stack complexity increases. Multiple DRAM dies have to be integrated with dense vertical interconnects while package height, thermal behaviour, power delivery, mechanical stress, test access, and yield remain within narrow limits. Packaging is consequently part of the memory architecture rather than a finishing operation performed after the important electrical work has been completed.

The Indiana site will include an Advanced Packaging R&D Testbed alongside the production lines. SK hynix says customers, universities, and business partners will be able to use the facility to develop packaging technology, build prototypes, and validate performance, while a memorandum of understanding with Purdue University covers joint research into system integration, HBM, and next-generation packaging.

Locating development and production functions together should give engineers a shorter route between prototype behaviour and manufacturing constraints. Changes to bonding, materials, thermal interfaces, substrate design, inspection, or test can affect both device performance and production yield, so development work becomes more useful when it is evaluated against equipment and process conditions resembling those intended for volume manufacture.

SK hynix is considering more than 100 companies as suppliers of materials, components, and equipment for the West Lafayette operation. The company estimates that construction and subsequent commercial operation will create about 7,000 direct and indirect jobs, although those employment figures remain projections until the facility and its supplier base are established.

The supplier requirement illustrates how much advanced packaging depends on specialised supporting processes. Substrates, bonding materials, inspection systems, thermal materials, wafer and die handling, test equipment, and process tooling all have qualification requirements, while a late change to one material or machine can force additional validation elsewhere in the flow.

The project also sits alongside SK hynix’s work on the interconnect architecture surrounding future memory. Its recent co-packaged optics roadmap examines how photonics and heterogeneous integration could tackle bandwidth and power constraints beyond the HBM stack itself. Indiana addresses the nearer manufacturing problem: packaging increasingly complex memory at sufficient yield and volume for accelerator systems already consuming HBM at scale.

The split Korea-US model does introduce its own operational dependency. High-value wafers will still cross the Pacific before packaging, so the new plant does not create a self-contained American memory supply chain. It instead relocates a strategically important manufacturing stage while preserving the Korean front-end capacity and process base on which SK hynix’s HBM output currently depends.

That arrangement will have to be managed across logistics, wafer handling, production planning, process qualification, and engineering change control. HBM demand can move quickly when accelerator generations ramp, but advanced packaging capacity cannot be added at the same speed as a conventional assembly line because tools, cleanroom infrastructure, materials, and processes must all be qualified before useful output follows.

Construction now gives the project a defined timetable after the investment was first announced in 2024. The cleanroom target is still more than two years away and volume production is planned a year after that. By 2029, the relevant measure will be whether the facility can transfer Korean-produced wafers into qualified US packaging and test at the yields, volumes, and cycle times demanded by the next generation of HBM.