IN Brief:
- Toshiba has added four 1-bit and two 2-bit devices to its 74AVC dual-supply bus transceiver family.
- The devices support bidirectional voltage-level shifting between 0.7V or 0.8V and up to 3.6V.
- Target interfaces include UART, GPIO, and SPI in edge AI, data-centre, and low-voltage SoC systems.
Toshiba Electronic Devices & Storage Corporation has expanded its 74AVC Series of dual power-supply bus transceivers with new 1-bit and 2-bit products for low-voltage level shifting.
The new 1-bit devices are the 74AVC1T45NX, 74AVCH1T45NX, 74AVC1T45FU, and 74AVCH1T45FU. The 2-bit additions are the 74AVC2T45FK and 74AVCH2T45FK. They extend the existing 74AVC range, giving designers smaller bit-count options for communication interfaces where a wider bus transceiver would add unnecessary channels.
The devices are designed for bidirectional voltage-level shifting between low-voltage systems and conventional-voltage systems. Depending on the product, the range supports operation from 0.7V or 0.8V up to 3.6V, making the family suitable for systems where newer SoCs operate at reduced voltage while surrounding circuitry, sensors, or legacy interfaces remain at higher voltage levels.
Toshiba is offering the parts in small package variants including leadless XSON6, leaded SOT-363, and SOT-765 packages. The 74AVC1T45NX and 74AVCH1T45NX are 1-bit devices in XSON6 packages measuring 1.45mm by 1.0mm by 0.48mm. The 74AVC1T45FU and 74AVCH1T45FU are 1-bit devices in SOT-363 packages, while the 74AVC2T45FK and 74AVCH2T45FK are 2-bit devices in SOT-765 packages.
The new transceivers use a push-pull buffer configuration for high-speed operation and are intended for interfaces including UART, GPIO, and SPI. They support dual power supplies without power-on or power-off sequence restrictions, using DIR pins for directional control and a high-impedance control method through the power-supply pins.
The 74AVCH versions also include an internal bus-hold function, which retains the previous input state when an input pin is floating. That can reduce the need for external pull-up or pull-down resistors and help avoid undefined signal states in compact designs.
The expansion follows a familiar change in embedded system design. Processor voltages continue to fall as SoCs are tuned for performance per watt, particularly in edge AI, portable equipment, industrial control, and data-processing applications. Many surrounding devices still rely on 1.8V, 2.5V, 3.3V, or mixed-voltage signalling, leaving board designers to bridge several voltage domains inside the same product.
Level shifting has therefore become a routine part of board architecture rather than an occasional interface fix. Low-voltage compute silicon often has to connect to sensors, memory-control signals, debug interfaces, expansion headers, and external communications devices operating at different levels. The translation component has to preserve signal integrity while fitting into dense layouts and supporting predictable start-up and shutdown behaviour.
Small bit-count devices are valuable in that environment because not every interface requires a four- or eight-bit solution. A two-line UART, a small GPIO group, or selected SPI control lines can be handled with 1-bit or 2-bit devices, reducing board area and avoiding unused channels. The smaller packages also allow interface conditioning to sit close to SoC pins, simplifying routing in compact embedded designs.
Power sequencing remains a practical constraint in mixed-voltage systems. Poorly controlled interfaces can lead to back-powering, bus contention, or undefined states during start-up and shutdown. Devices that remove sequencing restrictions and provide direction and high-impedance control reduce the burden on system-level power design.
The additions to Toshiba’s 74AVC range provide more granular options for interface-level voltage translation. The devices sit deep inside the schematic, but their role is central to making low-voltage processors, peripheral interfaces, and mixed-supply architectures behave cleanly once the board is assembled.
