Imagination adds GPU IP to automotive chiplet project

Imagination Technologies is contributing its DXS functionally safe GPU IP to the European CHASSIS automotive chiplet project, which is developing a 5nm Automotive Base Die for software-defined vehicle platforms.

The programme brings together European semiconductor, automotive, research, and technology partners to create a scalable chiplet ecosystem for high-performance vehicle electronics. Its Automotive Base Die is intended to provide integration and communication functions that allow different chiplets to be assembled into processors suited to cockpit, driver assistance, AI, and central compute workloads.

Imagination’s contribution centres on GPU IP for graphics-rich cockpit systems, infotainment, visualisation, and AI co-processing. The company’s DXS technology supports functionally safe applications and ASIL-B requirements, placing the graphics block within the safety and assurance expectations now attached to automotive compute. CHASSIS is also using UCIe-based interconnect concepts, reflecting wider industry adoption of standardised die-to-die communication.

With the Automotive Base Die moving through development and design freeze targeted for the end of 2026, the project is beginning to translate chiplet theory into a more defined vehicle electronics platform. Bosch is coordinating the work, with support from the Chips Joint Undertaking and national authorities, as Europe looks to retain more architectural influence over future automotive semiconductor systems.

Vehicle electronics have moved away from the older model of many narrow-function control units towards more centralised and zonal architectures. That shift concentrates more software, safety functions, graphics, sensor processing, connectivity, and security into fewer compute platforms. The result is a stronger requirement for semiconductor architectures that can scale across model ranges without forcing every function into a single monolithic die.

Chiplets offer a route through that constraint by allowing functions to be manufactured on suitable process nodes and integrated through defined interfaces. Automotive adoption, however, carries heavier qualification demands than data-centre or consumer applications. Safety partitioning, long-term supply, thermal behaviour, environmental stress, software updateability, and cybersecurity all have to be engineered into the platform rather than added after packaging decisions have already been made.

GPU IP has become part of that wider compute architecture. Cockpit displays, surround visualisation, driver monitoring, AI-assisted interfaces, and increasingly complex human-machine interaction all rely on graphics and parallel processing. In a vehicle, those workloads sit beside safety functions, real-time control, secure update systems, and long service-life requirements, making raw graphics performance only one part of the engineering problem.

The same convergence is reshaping the design-tool chain. The move towards multiphysics analysis across timing, power, thermal, electromagnetic, analogue, photonic, and multi-die design flows shows how advanced electronics can no longer be validated comfortably in isolated domains; integrated analysis environments are emerging because package, die, and system behaviour now interact earlier in the design process. Automotive chiplets compress those issues further by adding safety assurance and long lifecycle support.

Europe’s semiconductor strategy also sits behind the project. Automotive remains one of the region’s most important industrial sectors, yet much of the leading-edge semiconductor supply chain remains globally dispersed. Agreements linking UK research activity with advanced process development, including work around the UK Semiconductor Centre and Rapidus, point to the same strategic concern from another direction: access to manufacturing is only one part of sovereignty, while architecture, integration, validation, and qualification are equally important.

Imagination’s role gives the project a UK IP contribution in a field where graphics, AI acceleration, and functional safety are beginning to overlap. If automotive chiplets are to become more than a packaging concept, the IP blocks inside them will need to arrive with safety cases, software support, interface compatibility, and thermal assumptions that work across vehicle platforms.

The CHASSIS project will not remove Europe’s dependence on global semiconductor manufacturing, but it can create a stronger framework for how vehicle processors are designed and assembled. As software-defined vehicles absorb more compute, the ability to combine qualified IP blocks into modular, safe, and supportable semiconductor systems will become a central part of automotive electronics design.