IN Brief:
- Vertical Semiconductor has signed a letter of intent for up to $73 million in proposed US CHIPS research funding.
- The programme would develop vertical GaN FinFET power devices and support research into domestic semiconductor production.
- A proposed 2.5MW AI rack targets 30% lower energy losses and a 50% smaller footprint; neither improvement has been demonstrated.
Vertical Semiconductor has signed a letter of intent with the US Department of Commerce for up to $73 million in proposed research funding to develop vertical gallium nitride power transistors. The agreement forms part of a wider federal programme covering advanced power semiconductors and critical materials, with the Boston company’s research intended to improve electrical conversion efficiency in artificial intelligence computing infrastructure.
The proposed funding comes through the CHIPS Research and Development Office under the CHIPS and Science Act. It is one of four letters of intent announced by the Department of Commerce on 22 October, with combined proposed awards of up to $389 million. The agreements remain subject to finalisation, and the announcement does not establish that Vertical Semiconductor has received the full amount or obtained an unconditional funding commitment.
As a condition of the proposed awards, the US government would receive minority, non-controlling and non-voting equity stakes in the participating businesses. The other recipients identified in the announcement are Helion, Commonwealth Fusion Systems and Sibelco, whose projects concern semiconductor devices or materials for energy infrastructure and manufacturing. Vertical Semiconductor’s programme is directed specifically at power conversion for advanced computing.
The company is developing vertical gallium nitride field-effect transistors based on a fin-shaped semiconductor structure. Its research originated at the Massachusetts Institute of Technology, with earlier support from the US Department of Energy’s Advanced Research Projects Agency–Energy. The new programme would advance device development and support a route towards domestic production, although neither a qualified manufacturing process nor a commercial production date was announced.
Gallium nitride has electrical characteristics that make it attractive for power electronics, including a wide bandgap and the ability to support relatively high electric fields. These properties can enable switching devices that operate efficiently at demanding frequencies and voltages. Their useful performance depends on the transistor structure, its manufacturing quality, packaging and the behaviour of the surrounding power conversion circuit.
In conventional lateral GaN transistors, current primarily travels along the semiconductor surface. Vertical devices instead provide a current path through the thickness of the structure. This offers a different approach to increasing the voltage and current capability of a device, potentially allowing electrical performance to be improved without following the same geometric constraints encountered by lateral structures.
The FinFET architecture uses semiconductor fins to form the controlled current channel. Device dimensions and material interfaces influence how effectively the transistor can switch between conducting and blocking states. The proposed advantages must be evaluated through electrical measurements, including voltage blocking, current handling, conduction losses, switching losses and operation at elevated temperatures.
Thermal behaviour will be particularly important in high-density power conversion. A smaller semiconductor device may still require substantial cooling if losses are concentrated within a restricted area. Package resistance, interconnection geometry and heat transfer into the surrounding assembly affect how much electrical power a finished converter can handle continuously. Improvements measured at the transistor level therefore need to be validated in the complete power stage.
Vertical Semiconductor plans to work with commercial partners towards a demonstration involving a 2.5MW AI computing rack. The proposed system would use vertical GaN devices across multiple stages of the power conversion chain, from the incoming supply towards computing equipment. Its stated objectives include reducing energy losses by 30% and shrinking the physical footprint of power infrastructure by 50%.
Those figures describe planned performance improvements rather than verified results from a completed installation. The company has not disclosed the reference system, test conditions or independently measured results needed to substantiate the reductions. The demonstration itself remains a future development objective associated with the proposed research and commercialisation programme.
Power delivered to computing equipment normally passes through several conversion and distribution stages before reaching individual processors. Losses occur through semiconductor conduction, switching transitions, magnetic components and other circuit elements. Reducing those losses can decrease the heat that cooling systems must remove and may permit more of an installation’s available electrical capacity to be used for computing.
Improvements in one conversion stage do not automatically translate into equivalent improvements for the entire rack. The effect depends on the efficiency of the other stages, the voltage architecture and how the equipment operates under different loads. An assessment of the proposed 2.5MW system would therefore require measurements across the complete electrical arrangement, rather than extrapolation from the characteristics of an individual transistor.
The company raised $11 million in seed funding in October 2025, supporting development of its vertical GaN technology. The latest federal proposal offers a potential route to larger research and manufacturing programmes, but its eventual scale will depend on final award conditions and project execution. Commercial device specifications, production capacity and customer qualification milestones have not been provided.
The next steps concern completion of the funding arrangements and further electrical and manufacturing development. Until the proposed rack is constructed and evaluated, the stated reductions in energy losses and physical footprint remain engineering targets. The letter of intent establishes the scope of a proposed research programme, rather than completed evidence of its anticipated performance.
