Memory
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GlobalFoundries and RAAAM have taped out GCRAM test silicon successfully. Their FDX implementation targets 40% less memory area and power reductions reaching 60% against conventional SRAM.
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28nm SRAM macro tackles edge-AI overheads
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DRAM constraints reshape future HBM configurations
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Samsung previews vertical memory architectures for AI
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MediaTek qualifies Infineon flash for C-X1 cockpits
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NEO combines SRAM and HBM replacement concepts
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PCIe 6 fabric joins switching and storage
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HBF standard links flash capacity with UCIe
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UD Info targets configurable industrial memory
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Renesas pushes server MRDIMMs to 16,000MT/s