IN Brief:
- QSolid has made a tested 10-qubit demonstrator accessible, while its 30-qubit system remains under evaluation.
- Fraunhofer IPMS has characterised CMOS circuitry at cryogenic temperatures and investigated compact interposer packaging.
- The 26-partner programme has a €76.3 million budget and is scheduled to conclude in December 2026.
Fraunhofer IPMS has detailed the semiconductor and packaging research behind Germany’s QSolid quantum computing programme as the consortium tests a 30-qubit system. A smaller 10-qubit demonstrator has already been tested and made accessible to users, while the larger system remains under evaluation. The distinction separates operating research hardware from a processor whose testing is not yet complete.
QSolid brings together 26 research institutions, industrial companies and start-ups to develop quantum computing hardware and the supporting engineering infrastructure. The programme began in January 2022 and is due to conclude in December 2026. It has a total budget of €76.3 million, with 89.8% funded by Germany’s Federal Ministry of Research, Technology and Space, according to the project information published by Fraunhofer.
Its work spans the quantum processor, electronic control systems, packaging and the software used to operate the hardware. The consortium has examined the interaction between these elements using demonstration applications, including modelling spin resonance processes relevant to chemical analysis and magnetic resonance imaging. Such demonstrations investigate whether the hardware and control software can execute a specified workload together; they do not establish that the system outperforms classical computers in clinical imaging or chemical analysis.
The challenge of connecting a quantum processor to its control circuits becomes more demanding as qubit numbers rise. Superconducting quantum devices operate at extremely low temperatures, while much of the equipment used to generate signals, interpret measurements and manage computation is designed to operate substantially warmer. Electrical connections must carry the required signals into the cryogenic environment without transferring so much heat that the quantum hardware loses its operating conditions.
Fraunhofer IPMS worked with GlobalFoundries on cryogenic characterisation of complementary metal-oxide-semiconductor circuits. CMOS is established throughout conventional semiconductor manufacturing, but transistor and circuit characteristics can differ markedly at cryogenic temperatures. Measuring their behaviour under those conditions helps determine which control functions may be integrated closer to the quantum chip and which will still require electronics elsewhere in the system.
Closer integration could shorten some signal paths and reduce the complexity associated with external wiring, although it also places greater demands on power dissipation and thermal management. The effects depend on circuit implementation and the available cooling capacity. The consortium has not claimed that all control functions can simply be transferred into a single cryogenic device.
Alongside the circuit research, Fraunhofer IPMS and Fraunhofer IZM-ASSID developed advanced packaging approaches through the Center for Advanced CMOS and Heterointegration Saxony. Their work uses interposers to connect quantum chips with control chips in a compact assembly. An interposer provides an intermediate structure carrying electrical connections between separate semiconductor devices, offering more flexibility in connection geometry than some conventional board-level arrangements.
The packaging must balance dense electrical interconnection against the need to protect temperature-sensitive quantum circuits from heat. Signal transmission also needs to remain sufficiently reliable for the control and readout functions involved. Research using established silicon processing methods is intended to explore manufacturing routes that can be reproduced as designs become more complex, rather than relying entirely on bespoke laboratory assemblies.
Expanding a quantum processor requires more than adding qubits to the chip. Control signals must reach the correct devices, measurement results must be collected, and interactions between channels must remain manageable. The software coordinating those activities has to operate within the physical limits of the available hardware, including timing and readout performance. QSolid’s system-level demonstrations allow researchers to assess these dependencies while identifying components that need further development.
The project has produced multiple demonstrators and has made some prototypes accessible through the cloud. Fraunhofer also reports that elements of the programme’s expertise have entered products and services, without identifying the 30-qubit system as generally available. No detailed, independently benchmarked error rate for that larger system was provided in the October announcement, and its current status should therefore remain described as testing.
Researchers and industrial partners are scheduled to meet in Jülich from 27 to 29 October to present results from the programme. The closing event comes ahead of the project’s formal December end date and will cover the progress of its hardware and software work. Further assessment of the 30-qubit system will depend on completed tests, alongside evidence that its control electronics and packaging can support more demanding processor configurations.
