IN Brief:
- Saelig has introduced Jetperch’s Joulescope JS320 precision DC energy analyser.
- The instrument measures current from nanoamps to amps while simultaneously measuring voltage.
- Low-power embedded design is making time-domain energy measurement central to hardware and firmware decisions.
Saelig Company has introduced Jetperch’s Joulescope JS320 precision DC energy analyser for low-power and battery-powered embedded systems.
The JS320 measures current from nanoamps to amps while simultaneously measuring voltage. Its software calculates power, energy, and charge directly, allowing development teams to estimate battery life, compare operating modes, optimise firmware, validate hardware decisions, and assess power-supply requirements.
Average current is no longer enough in many embedded designs, because devices built around wireless radios, sensors, microcontrollers, displays, security elements, and energy-harvesting subsystems often move rapidly between deep sleep, active processing, RF transmission, sensing, and peripheral wake states. Battery life depends on the shape and timing of those transitions as much as the headline sleep current.
Jetperch’s third-generation instrument focuses on offset stability, leakage current, range-change behaviour, and time-domain response. The JS320 includes improved offset stability, reduced leakage current, Enwavify v2 technology for current range changes, a 24-bit ADC, wider internal digital processing, and a linear-phase analogue path.
Low-power systems are often judged by events that are easy to miss. A radio burst, sensor conversion, processor wake-up, flash write, display refresh, or regulator transient can dominate energy use even when it occupies only a small fraction of operating time. If the instrument cannot follow those events cleanly across current ranges, firmware and hardware decisions can be made against misleading data.
The JS320 gives developers a way to observe those behaviours without building a full custom measurement chain. Early power work often relies on oscilloscopes, shunts, source measurement units, multimeters, or evaluation-board telemetry. Each route has trade-offs around burden voltage, bandwidth, dynamic range, synchronisation, noise, and ease of use.
Embedded products are also becoming more software-defined. GigaDevice and Qt’s work to streamline embedded GUI development on the GD32H7 platform underlines how microcontroller-based systems are taking on richer interfaces and more software complexity. More capable firmware stacks make power profiling harder because background tasks, interrupts, graphics updates, connectivity stacks, and security routines can all affect energy use.
The design challenge extends well beyond consumer IoT. Industrial sensors, asset trackers, medical wearables, environmental monitors, building controls, smart meters, and agricultural electronics all need predictable battery life in real operating conditions. Many of these systems are expected to run for months or years, often in environments where maintenance visits are expensive.
Accurate power measurement also supports component selection. A microcontroller with attractive sleep-current figures may behave differently once peripherals, external memories, sensors, radio modules, and regulators are included. DC/DC converter efficiency can vary sharply across load ranges, while leakage through pull-ups, level shifters, protection devices, and board contamination can become visible only when measuring at low currents over time.
Firmware remains one of the largest controllable variables. Measurement tools that link time-domain current behaviour with software activity can reveal unnecessary polling, delayed sleep entry, excessive sensor sampling, inefficient radio scheduling, or unplanned peripheral wake-ups. In many designs, the cheapest battery-life improvement comes from code rather than hardware.
Instruments such as the JS320 bring precision measurement closer to day-to-day embedded development. As low-power systems become more connected and more complex, power profiling is becoming a core engineering task rather than a final validation step.
