Category: Design engineering
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Signaloid plans chiplet versions of its UxHw stochastic accelerator technology. Open Chiplet Atlas participation follows tapeout of its dedicated C0 ASIC.
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TES has launched silicon-proven switched-capacitor IP for low-current power conversion. The X-FAB implementation produces 3.6V from inputs between 2.5V and 5.5V.
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ETRI has deployed Anritsu VectorStar for broadband GaN MMIC evaluation. The 220GHz platform supports consistent on-wafer characterisation into sub-terahertz frequencies.
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Cognichip has launched ACI Enterprise for full-stack AI chip design. The system connects specification analysis, RTL development, verification, debugging, and PPA optimisation through semiconductor-specific AI models and controlled enterprise data.
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ZEISS has launched VersaXRM 5 Insight for multiscale X-ray analysis. The system combines microCT overview imaging, targeted X-ray microscopy, guided workflows, and AI-assisted reconstruction for non-destructive inspection.
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Fortaegis has raised $50 million to commercialise silicon-rooted security globally. The Dutch company is moving its Secure Compute architecture towards production, FPGA deployment, and later ASIC implementations.
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Keysight has joined EuroCDP to widen European startup EDA access. The agreement brings RF, electromagnetic, high-speed digital, device-modelling, training, and design-data tools into the Chips Act-backed platform.
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Taiyo Holdings has demonstrated 700nm RDL features on 300mm wafers. The three-layer structure uses its FPIM photosensitive dielectric for dual-damascene processing, with both interconnects and vias reaching the target dimension.
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Accuray and RaySearch are expanding software integration for adaptive radiotherapy. An $8m RayStation licence commitment supports the initial Radixact deployment, with CyberKnife integration planned later.
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ROHM has launched 0402 anti-surge resistors with 0.33W rated power. The SDR01 series targets high-density automotive, industrial, and AI-server power and control circuitry.