Category: Design engineering
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Tower and Xanadu have tightened their silicon photonics partnership further. The companies have co-engineered a production flow for Xanadu’s custom material stack on Tower’s high-volume SiPho platform, targeting manufacturable photonic quantum hardware for fault-tolerant systems.
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MIT has demonstrated paired PUFs using standard CMOS fabrication steps. A new “twin fingerprint” method lets two chips authenticate each other directly, avoiding external storage of secret fingerprint data, and targeting power-constrained paired devices such as medical sensors.
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Nordson will showcase coating and soldering systems at APEX 2026. In Anaheim, the company plans live demonstrations focused on process control, traceability, and higher-yield PCB assembly, including updates to its ASYMTEK Select Coat platform and its SELECT Synchro selective soldering line.
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AI data centres are turning NAND into a scarce resource. Phison is warning of a 2026 squeeze as enterprise SSD demand accelerates for inference, vector search, and cold-tier storage. With suppliers prioritising margin and process transitions limiting bit growth, embedded buyers may find eMMC and UFS harder to source.
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Samsung has begun shipping HBM4 memory for AI accelerators commercially. The company says production uses a 10 nm-class DRAM process with a 4 nm logic base die, delivering 11.7 Gbps per pin, up to 3.3 TB/s per stack, and 24–36 GB capacities.
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ROHM has added HPLF5060 packages to automotive MOSFETs for 40V/60V. The new footprint targets tighter ECU layouts while improving solder-joint robustness with gull-wing leads and copper clip junctions, aiming at applications such as inverter control, electric pumps, and LED headlamps.
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ByteSnap and Digi bundle embedded Linux security service. The managed offering targets long-life connected devices, combining vulnerability intelligence, targeted patching, and deployment validation for heterogeneous hardware estates.
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A recycled-titanium helicopter bracket has completed its first flight successfully. Laser powder bed fusion produced the part from aircraft scrap powder, demonstrating a route to qualified AM titanium feedstock inside the UK defence supply chain.
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Ireland has launched I-C3 to accelerate custom chip design locally. The new competence centre, coordinated by Tyndall, will give startups and SMEs access to design tools, pilot lines, training, and funding routes under Europe’s Chips Act programme.
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Taoglas has launched an AI antenna recommendation engine worldwide. The tool shortlists antennas using project constraints, aiming to cut early RF selection time and reduce late-stage redesign and certification churn.